diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/sumo_dpm.c')
-rw-r--r-- | drivers/gpu/drm/radeon/sumo_dpm.c | 22 |
1 files changed, 20 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/sumo_dpm.c b/drivers/gpu/drm/radeon/sumo_dpm.c index c0a850319908..864761c0120e 100644 --- a/drivers/gpu/drm/radeon/sumo_dpm.c +++ b/drivers/gpu/drm/radeon/sumo_dpm.c | |||
@@ -1483,6 +1483,7 @@ static int sumo_parse_power_table(struct radeon_device *rdev) | |||
1483 | rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); | 1483 | rdev->pm.dpm.backbias_response_time = le16_to_cpu(power_info->pplib.usBackbiasTime); |
1484 | rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); | 1484 | rdev->pm.dpm.voltage_response_time = le16_to_cpu(power_info->pplib.usVoltageTime); |
1485 | for (i = 0; i < state_array->ucNumEntries; i++) { | 1485 | for (i = 0; i < state_array->ucNumEntries; i++) { |
1486 | u8 *idx; | ||
1486 | power_state = (union pplib_power_state *)power_state_offset; | 1487 | power_state = (union pplib_power_state *)power_state_offset; |
1487 | non_clock_array_index = power_state->v2.nonClockInfoIndex; | 1488 | non_clock_array_index = power_state->v2.nonClockInfoIndex; |
1488 | non_clock_info = (struct _ATOM_PPLIB_NONCLOCK_INFO *) | 1489 | non_clock_info = (struct _ATOM_PPLIB_NONCLOCK_INFO *) |
@@ -1496,12 +1497,15 @@ static int sumo_parse_power_table(struct radeon_device *rdev) | |||
1496 | } | 1497 | } |
1497 | rdev->pm.dpm.ps[i].ps_priv = ps; | 1498 | rdev->pm.dpm.ps[i].ps_priv = ps; |
1498 | k = 0; | 1499 | k = 0; |
1500 | idx = (u8 *)&power_state->v2.clockInfoIndex[0]; | ||
1499 | for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) { | 1501 | for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) { |
1500 | clock_array_index = power_state->v2.clockInfoIndex[j]; | 1502 | clock_array_index = idx[j]; |
1501 | if (k >= SUMO_MAX_HARDWARE_POWERLEVELS) | 1503 | if (k >= SUMO_MAX_HARDWARE_POWERLEVELS) |
1502 | break; | 1504 | break; |
1505 | |||
1503 | clock_info = (union pplib_clock_info *) | 1506 | clock_info = (union pplib_clock_info *) |
1504 | &clock_info_array->clockInfo[clock_array_index * clock_info_array->ucEntrySize]; | 1507 | ((u8 *)&clock_info_array->clockInfo[0] + |
1508 | (clock_array_index * clock_info_array->ucEntrySize)); | ||
1505 | sumo_parse_pplib_clock_info(rdev, | 1509 | sumo_parse_pplib_clock_info(rdev, |
1506 | &rdev->pm.dpm.ps[i], k, | 1510 | &rdev->pm.dpm.ps[i], k, |
1507 | clock_info); | 1511 | clock_info); |
@@ -1530,6 +1534,20 @@ u32 sumo_convert_vid2_to_vid7(struct radeon_device *rdev, | |||
1530 | return vid_mapping_table->entries[vid_mapping_table->num_entries - 1].vid_7bit; | 1534 | return vid_mapping_table->entries[vid_mapping_table->num_entries - 1].vid_7bit; |
1531 | } | 1535 | } |
1532 | 1536 | ||
1537 | u32 sumo_convert_vid7_to_vid2(struct radeon_device *rdev, | ||
1538 | struct sumo_vid_mapping_table *vid_mapping_table, | ||
1539 | u32 vid_7bit) | ||
1540 | { | ||
1541 | u32 i; | ||
1542 | |||
1543 | for (i = 0; i < vid_mapping_table->num_entries; i++) { | ||
1544 | if (vid_mapping_table->entries[i].vid_7bit == vid_7bit) | ||
1545 | return vid_mapping_table->entries[i].vid_2bit; | ||
1546 | } | ||
1547 | |||
1548 | return vid_mapping_table->entries[vid_mapping_table->num_entries - 1].vid_2bit; | ||
1549 | } | ||
1550 | |||
1533 | static u16 sumo_convert_voltage_index_to_value(struct radeon_device *rdev, | 1551 | static u16 sumo_convert_voltage_index_to_value(struct radeon_device *rdev, |
1534 | u32 vid_2bit) | 1552 | u32 vid_2bit) |
1535 | { | 1553 | { |