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path: root/drivers/gpu/drm/radeon/sid.h
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Diffstat (limited to 'drivers/gpu/drm/radeon/sid.h')
-rw-r--r--drivers/gpu/drm/radeon/sid.h47
1 files changed, 46 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h
index 7e2e0ea66a00..b322acc48097 100644
--- a/drivers/gpu/drm/radeon/sid.h
+++ b/drivers/gpu/drm/radeon/sid.h
@@ -478,7 +478,7 @@
478#define STATE3_MASK (0x1f << 15) 478#define STATE3_MASK (0x1f << 15)
479#define STATE3_SHIFT 15 479#define STATE3_SHIFT 15
480 480
481#define MC_SEQ_TRAIN_WAKEUP_CNTL 0x2808 481#define MC_SEQ_TRAIN_WAKEUP_CNTL 0x28e8
482#define TRAIN_DONE_D0 (1 << 30) 482#define TRAIN_DONE_D0 (1 << 30)
483#define TRAIN_DONE_D1 (1 << 31) 483#define TRAIN_DONE_D1 (1 << 31)
484 484
@@ -683,6 +683,51 @@
683 * bit5 = 176.4 kHz 683 * bit5 = 176.4 kHz
684 * bit6 = 192 kHz 684 * bit6 = 192 kHz
685 */ 685 */
686
687#define AZ_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC 0x37
688# define VIDEO_LIPSYNC(x) (((x) & 0xff) << 0)
689# define AUDIO_LIPSYNC(x) (((x) & 0xff) << 8)
690/* VIDEO_LIPSYNC, AUDIO_LIPSYNC
691 * 0 = invalid
692 * x = legal delay value
693 * 255 = sync not supported
694 */
695#define AZ_F0_CODEC_PIN_CONTROL_RESPONSE_HBR 0x38
696# define HBR_CAPABLE (1 << 0) /* enabled by default */
697
698#define AZ_F0_CODEC_PIN_CONTROL_SINK_INFO0 0x3a
699# define MANUFACTURER_ID(x) (((x) & 0xffff) << 0)
700# define PRODUCT_ID(x) (((x) & 0xffff) << 16)
701#define AZ_F0_CODEC_PIN_CONTROL_SINK_INFO1 0x3b
702# define SINK_DESCRIPTION_LEN(x) (((x) & 0xff) << 0)
703#define AZ_F0_CODEC_PIN_CONTROL_SINK_INFO2 0x3c
704# define PORT_ID0(x) (((x) & 0xffffffff) << 0)
705#define AZ_F0_CODEC_PIN_CONTROL_SINK_INFO3 0x3d
706# define PORT_ID1(x) (((x) & 0xffffffff) << 0)
707#define AZ_F0_CODEC_PIN_CONTROL_SINK_INFO4 0x3e
708# define DESCRIPTION0(x) (((x) & 0xff) << 0)
709# define DESCRIPTION1(x) (((x) & 0xff) << 8)
710# define DESCRIPTION2(x) (((x) & 0xff) << 16)
711# define DESCRIPTION3(x) (((x) & 0xff) << 24)
712#define AZ_F0_CODEC_PIN_CONTROL_SINK_INFO5 0x3f
713# define DESCRIPTION4(x) (((x) & 0xff) << 0)
714# define DESCRIPTION5(x) (((x) & 0xff) << 8)
715# define DESCRIPTION6(x) (((x) & 0xff) << 16)
716# define DESCRIPTION7(x) (((x) & 0xff) << 24)
717#define AZ_F0_CODEC_PIN_CONTROL_SINK_INFO6 0x40
718# define DESCRIPTION8(x) (((x) & 0xff) << 0)
719# define DESCRIPTION9(x) (((x) & 0xff) << 8)
720# define DESCRIPTION10(x) (((x) & 0xff) << 16)
721# define DESCRIPTION11(x) (((x) & 0xff) << 24)
722#define AZ_F0_CODEC_PIN_CONTROL_SINK_INFO7 0x41
723# define DESCRIPTION12(x) (((x) & 0xff) << 0)
724# define DESCRIPTION13(x) (((x) & 0xff) << 8)
725# define DESCRIPTION14(x) (((x) & 0xff) << 16)
726# define DESCRIPTION15(x) (((x) & 0xff) << 24)
727#define AZ_F0_CODEC_PIN_CONTROL_SINK_INFO8 0x42
728# define DESCRIPTION16(x) (((x) & 0xff) << 0)
729# define DESCRIPTION17(x) (((x) & 0xff) << 8)
730
686#define AZ_F0_CODEC_PIN_CONTROL_HOTPLUG_CONTROL 0x54 731#define AZ_F0_CODEC_PIN_CONTROL_HOTPLUG_CONTROL 0x54
687# define AUDIO_ENABLED (1 << 31) 732# define AUDIO_ENABLED (1 << 31)
688 733