diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/si_dpm.c')
-rw-r--r-- | drivers/gpu/drm/radeon/si_dpm.c | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c index cfe5d4d28915..9ace28702c76 100644 --- a/drivers/gpu/drm/radeon/si_dpm.c +++ b/drivers/gpu/drm/radeon/si_dpm.c | |||
@@ -2910,6 +2910,7 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev, | |||
2910 | bool disable_sclk_switching = false; | 2910 | bool disable_sclk_switching = false; |
2911 | u32 mclk, sclk; | 2911 | u32 mclk, sclk; |
2912 | u16 vddc, vddci; | 2912 | u16 vddc, vddci; |
2913 | u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc; | ||
2913 | int i; | 2914 | int i; |
2914 | 2915 | ||
2915 | if ((rdev->pm.dpm.new_active_crtc_count > 1) || | 2916 | if ((rdev->pm.dpm.new_active_crtc_count > 1) || |
@@ -2943,6 +2944,29 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev, | |||
2943 | } | 2944 | } |
2944 | } | 2945 | } |
2945 | 2946 | ||
2947 | /* limit clocks to max supported clocks based on voltage dependency tables */ | ||
2948 | btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk, | ||
2949 | &max_sclk_vddc); | ||
2950 | btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk, | ||
2951 | &max_mclk_vddci); | ||
2952 | btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk, | ||
2953 | &max_mclk_vddc); | ||
2954 | |||
2955 | for (i = 0; i < ps->performance_level_count; i++) { | ||
2956 | if (max_sclk_vddc) { | ||
2957 | if (ps->performance_levels[i].sclk > max_sclk_vddc) | ||
2958 | ps->performance_levels[i].sclk = max_sclk_vddc; | ||
2959 | } | ||
2960 | if (max_mclk_vddci) { | ||
2961 | if (ps->performance_levels[i].mclk > max_mclk_vddci) | ||
2962 | ps->performance_levels[i].mclk = max_mclk_vddci; | ||
2963 | } | ||
2964 | if (max_mclk_vddc) { | ||
2965 | if (ps->performance_levels[i].mclk > max_mclk_vddc) | ||
2966 | ps->performance_levels[i].mclk = max_mclk_vddc; | ||
2967 | } | ||
2968 | } | ||
2969 | |||
2946 | /* XXX validate the min clocks required for display */ | 2970 | /* XXX validate the min clocks required for display */ |
2947 | 2971 | ||
2948 | if (disable_mclk_switching) { | 2972 | if (disable_mclk_switching) { |