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path: root/drivers/gpu/drm/radeon/si.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/si.c')
-rw-r--r--drivers/gpu/drm/radeon/si.c47
1 files changed, 28 insertions, 19 deletions
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index df8dd7701643..b0db712060fb 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -2808,26 +2808,31 @@ void si_vm_set_page(struct radeon_device *rdev, uint64_t pe,
2808{ 2808{
2809 struct radeon_ring *ring = &rdev->ring[rdev->asic->vm.pt_ring_index]; 2809 struct radeon_ring *ring = &rdev->ring[rdev->asic->vm.pt_ring_index];
2810 uint32_t r600_flags = cayman_vm_page_flags(rdev, flags); 2810 uint32_t r600_flags = cayman_vm_page_flags(rdev, flags);
2811 int i;
2812 uint64_t value;
2813 2811
2814 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 2 + count * 2)); 2812 while (count) {
2815 radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) | 2813 unsigned ndw = 2 + count * 2;
2816 WRITE_DATA_DST_SEL(1))); 2814 if (ndw > 0x3FFE)
2817 radeon_ring_write(ring, pe); 2815 ndw = 0x3FFE;
2818 radeon_ring_write(ring, upper_32_bits(pe)); 2816
2819 for (i = 0; i < count; ++i) { 2817 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, ndw));
2820 if (flags & RADEON_VM_PAGE_SYSTEM) { 2818 radeon_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |
2821 value = radeon_vm_map_gart(rdev, addr); 2819 WRITE_DATA_DST_SEL(1)));
2822 value &= 0xFFFFFFFFFFFFF000ULL; 2820 radeon_ring_write(ring, pe);
2823 } else if (flags & RADEON_VM_PAGE_VALID) 2821 radeon_ring_write(ring, upper_32_bits(pe));
2824 value = addr; 2822 for (; ndw > 2; ndw -= 2, --count, pe += 8) {
2825 else 2823 uint64_t value;
2826 value = 0; 2824 if (flags & RADEON_VM_PAGE_SYSTEM) {
2827 addr += incr; 2825 value = radeon_vm_map_gart(rdev, addr);
2828 value |= r600_flags; 2826 value &= 0xFFFFFFFFFFFFF000ULL;
2829 radeon_ring_write(ring, value); 2827 } else if (flags & RADEON_VM_PAGE_VALID)
2830 radeon_ring_write(ring, upper_32_bits(value)); 2828 value = addr;
2829 else
2830 value = 0;
2831 addr += incr;
2832 value |= r600_flags;
2833 radeon_ring_write(ring, value);
2834 radeon_ring_write(ring, upper_32_bits(value));
2835 }
2831 } 2836 }
2832} 2837}
2833 2838
@@ -2868,6 +2873,10 @@ void si_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm)
2868 radeon_ring_write(ring, VM_INVALIDATE_REQUEST >> 2); 2873 radeon_ring_write(ring, VM_INVALIDATE_REQUEST >> 2);
2869 radeon_ring_write(ring, 0); 2874 radeon_ring_write(ring, 0);
2870 radeon_ring_write(ring, 1 << vm->id); 2875 radeon_ring_write(ring, 1 << vm->id);
2876
2877 /* sync PFP to ME, otherwise we might get invalid PFP reads */
2878 radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
2879 radeon_ring_write(ring, 0x0);
2871} 2880}
2872 2881
2873/* 2882/*