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path: root/drivers/gpu/drm/radeon/rv770d.h
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Diffstat (limited to 'drivers/gpu/drm/radeon/rv770d.h')
-rw-r--r--drivers/gpu/drm/radeon/rv770d.h71
1 files changed, 71 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h
index b0adfc595d75..20e29d23d348 100644
--- a/drivers/gpu/drm/radeon/rv770d.h
+++ b/drivers/gpu/drm/radeon/rv770d.h
@@ -109,6 +109,9 @@
109#define PIPE_TILING__SHIFT 1 109#define PIPE_TILING__SHIFT 1
110#define PIPE_TILING__MASK 0x0000000e 110#define PIPE_TILING__MASK 0x0000000e
111 111
112#define DMA_TILING_CONFIG 0x3ec8
113#define DMA_TILING_CONFIG2 0xd0b8
114
112#define GC_USER_SHADER_PIPE_CONFIG 0x8954 115#define GC_USER_SHADER_PIPE_CONFIG 0x8954
113#define INACTIVE_QD_PIPES(x) ((x) << 8) 116#define INACTIVE_QD_PIPES(x) ((x) << 8)
114#define INACTIVE_QD_PIPES_MASK 0x0000FF00 117#define INACTIVE_QD_PIPES_MASK 0x0000FF00
@@ -358,6 +361,26 @@
358 361
359#define WAIT_UNTIL 0x8040 362#define WAIT_UNTIL 0x8040
360 363
364/* async DMA */
365#define DMA_RB_RPTR 0xd008
366#define DMA_RB_WPTR 0xd00c
367
368/* async DMA packets */
369#define DMA_PACKET(cmd, t, s, n) ((((cmd) & 0xF) << 28) | \
370 (((t) & 0x1) << 23) | \
371 (((s) & 0x1) << 22) | \
372 (((n) & 0xFFFF) << 0))
373/* async DMA Packet types */
374#define DMA_PACKET_WRITE 0x2
375#define DMA_PACKET_COPY 0x3
376#define DMA_PACKET_INDIRECT_BUFFER 0x4
377#define DMA_PACKET_SEMAPHORE 0x5
378#define DMA_PACKET_FENCE 0x6
379#define DMA_PACKET_TRAP 0x7
380#define DMA_PACKET_CONSTANT_FILL 0xd
381#define DMA_PACKET_NOP 0xf
382
383
361#define SRBM_STATUS 0x0E50 384#define SRBM_STATUS 0x0E50
362 385
363/* DCE 3.2 HDMI */ 386/* DCE 3.2 HDMI */
@@ -551,6 +574,54 @@
551#define HDMI_OFFSET0 (0x7400 - 0x7400) 574#define HDMI_OFFSET0 (0x7400 - 0x7400)
552#define HDMI_OFFSET1 (0x7800 - 0x7400) 575#define HDMI_OFFSET1 (0x7800 - 0x7400)
553 576
577/* DCE3.2 ELD audio interface */
578#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR0 0x71c8 /* LPCM */
579#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR1 0x71cc /* AC3 */
580#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR2 0x71d0 /* MPEG1 */
581#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR3 0x71d4 /* MP3 */
582#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR4 0x71d8 /* MPEG2 */
583#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR5 0x71dc /* AAC */
584#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR6 0x71e0 /* DTS */
585#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR7 0x71e4 /* ATRAC */
586#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR8 0x71e8 /* one bit audio - leave at 0 (default) */
587#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR9 0x71ec /* Dolby Digital */
588#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR10 0x71f0 /* DTS-HD */
589#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR11 0x71f4 /* MAT-MLP */
590#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR12 0x71f8 /* DTS */
591#define AZ_F0_CODEC_PIN0_CONTROL_AUDIO_DESCRIPTOR13 0x71fc /* WMA Pro */
592# define MAX_CHANNELS(x) (((x) & 0x7) << 0)
593/* max channels minus one. 7 = 8 channels */
594# define SUPPORTED_FREQUENCIES(x) (((x) & 0xff) << 8)
595# define DESCRIPTOR_BYTE_2(x) (((x) & 0xff) << 16)
596# define SUPPORTED_FREQUENCIES_STEREO(x) (((x) & 0xff) << 24) /* LPCM only */
597/* SUPPORTED_FREQUENCIES, SUPPORTED_FREQUENCIES_STEREO
598 * bit0 = 32 kHz
599 * bit1 = 44.1 kHz
600 * bit2 = 48 kHz
601 * bit3 = 88.2 kHz
602 * bit4 = 96 kHz
603 * bit5 = 176.4 kHz
604 * bit6 = 192 kHz
605 */
606
607#define AZ_HOT_PLUG_CONTROL 0x7300
608# define AZ_FORCE_CODEC_WAKE (1 << 0)
609# define PIN0_JACK_DETECTION_ENABLE (1 << 4)
610# define PIN1_JACK_DETECTION_ENABLE (1 << 5)
611# define PIN2_JACK_DETECTION_ENABLE (1 << 6)
612# define PIN3_JACK_DETECTION_ENABLE (1 << 7)
613# define PIN0_UNSOLICITED_RESPONSE_ENABLE (1 << 8)
614# define PIN1_UNSOLICITED_RESPONSE_ENABLE (1 << 9)
615# define PIN2_UNSOLICITED_RESPONSE_ENABLE (1 << 10)
616# define PIN3_UNSOLICITED_RESPONSE_ENABLE (1 << 11)
617# define CODEC_HOT_PLUG_ENABLE (1 << 12)
618# define PIN0_AUDIO_ENABLED (1 << 24)
619# define PIN1_AUDIO_ENABLED (1 << 25)
620# define PIN2_AUDIO_ENABLED (1 << 26)
621# define PIN3_AUDIO_ENABLED (1 << 27)
622# define AUDIO_ENABLED (1 << 31)
623
624
554#define D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110 625#define D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110
555#define D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x6914 626#define D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x6914
556#define D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x6114 627#define D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x6114