diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/rv515.c')
-rw-r--r-- | drivers/gpu/drm/radeon/rv515.c | 24 |
1 files changed, 13 insertions, 11 deletions
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c index ba68c9fe90a1..59632a506b46 100644 --- a/drivers/gpu/drm/radeon/rv515.c +++ b/drivers/gpu/drm/radeon/rv515.c | |||
@@ -478,7 +478,6 @@ static int rv515_startup(struct radeon_device *rdev) | |||
478 | return r; | 478 | return r; |
479 | } | 479 | } |
480 | /* Enable IRQ */ | 480 | /* Enable IRQ */ |
481 | rdev->irq.sw_int = true; | ||
482 | rs600_irq_set(rdev); | 481 | rs600_irq_set(rdev); |
483 | /* 1M ring buffer */ | 482 | /* 1M ring buffer */ |
484 | r = r100_cp_init(rdev, 1024 * 1024); | 483 | r = r100_cp_init(rdev, 1024 * 1024); |
@@ -514,6 +513,8 @@ int rv515_resume(struct radeon_device *rdev) | |||
514 | atom_asic_init(rdev->mode_info.atom_context); | 513 | atom_asic_init(rdev->mode_info.atom_context); |
515 | /* Resume clock after posting */ | 514 | /* Resume clock after posting */ |
516 | rv515_clock_startup(rdev); | 515 | rv515_clock_startup(rdev); |
516 | /* Initialize surface registers */ | ||
517 | radeon_surface_init(rdev); | ||
517 | return rv515_startup(rdev); | 518 | return rv515_startup(rdev); |
518 | } | 519 | } |
519 | 520 | ||
@@ -540,11 +541,11 @@ void rv515_fini(struct radeon_device *rdev) | |||
540 | r100_wb_fini(rdev); | 541 | r100_wb_fini(rdev); |
541 | r100_ib_fini(rdev); | 542 | r100_ib_fini(rdev); |
542 | radeon_gem_fini(rdev); | 543 | radeon_gem_fini(rdev); |
543 | rv370_pcie_gart_fini(rdev); | 544 | rv370_pcie_gart_fini(rdev); |
544 | radeon_agp_fini(rdev); | 545 | radeon_agp_fini(rdev); |
545 | radeon_irq_kms_fini(rdev); | 546 | radeon_irq_kms_fini(rdev); |
546 | radeon_fence_driver_fini(rdev); | 547 | radeon_fence_driver_fini(rdev); |
547 | radeon_object_fini(rdev); | 548 | radeon_bo_fini(rdev); |
548 | radeon_atombios_fini(rdev); | 549 | radeon_atombios_fini(rdev); |
549 | kfree(rdev->bios); | 550 | kfree(rdev->bios); |
550 | rdev->bios = NULL; | 551 | rdev->bios = NULL; |
@@ -580,10 +581,8 @@ int rv515_init(struct radeon_device *rdev) | |||
580 | RREG32(R_0007C0_CP_STAT)); | 581 | RREG32(R_0007C0_CP_STAT)); |
581 | } | 582 | } |
582 | /* check if cards are posted or not */ | 583 | /* check if cards are posted or not */ |
583 | if (!radeon_card_posted(rdev) && rdev->bios) { | 584 | if (radeon_boot_test_post_card(rdev) == false) |
584 | DRM_INFO("GPU not posted. posting now...\n"); | 585 | return -EINVAL; |
585 | atom_asic_init(rdev->mode_info.atom_context); | ||
586 | } | ||
587 | /* Initialize clocks */ | 586 | /* Initialize clocks */ |
588 | radeon_get_clock_info(rdev->ddev); | 587 | radeon_get_clock_info(rdev->ddev); |
589 | /* Initialize power management */ | 588 | /* Initialize power management */ |
@@ -603,7 +602,7 @@ int rv515_init(struct radeon_device *rdev) | |||
603 | if (r) | 602 | if (r) |
604 | return r; | 603 | return r; |
605 | /* Memory manager */ | 604 | /* Memory manager */ |
606 | r = radeon_object_init(rdev); | 605 | r = radeon_bo_init(rdev); |
607 | if (r) | 606 | if (r) |
608 | return r; | 607 | return r; |
609 | r = rv370_pcie_gart_init(rdev); | 608 | r = rv370_pcie_gart_init(rdev); |
@@ -892,8 +891,9 @@ void rv515_crtc_bandwidth_compute(struct radeon_device *rdev, | |||
892 | 891 | ||
893 | b.full = rfixed_const(mode->crtc_hdisplay); | 892 | b.full = rfixed_const(mode->crtc_hdisplay); |
894 | c.full = rfixed_const(256); | 893 | c.full = rfixed_const(256); |
895 | a.full = rfixed_mul(wm->num_line_pair, b); | 894 | a.full = rfixed_div(b, c); |
896 | request_fifo_depth.full = rfixed_div(a, c); | 895 | request_fifo_depth.full = rfixed_mul(a, wm->num_line_pair); |
896 | request_fifo_depth.full = rfixed_ceil(request_fifo_depth); | ||
897 | if (a.full < rfixed_const(4)) { | 897 | if (a.full < rfixed_const(4)) { |
898 | wm->lb_request_fifo_depth = 4; | 898 | wm->lb_request_fifo_depth = 4; |
899 | } else { | 899 | } else { |
@@ -995,15 +995,17 @@ void rv515_crtc_bandwidth_compute(struct radeon_device *rdev, | |||
995 | a.full = rfixed_const(16); | 995 | a.full = rfixed_const(16); |
996 | wm->priority_mark_max.full = rfixed_const(crtc->base.mode.crtc_hdisplay); | 996 | wm->priority_mark_max.full = rfixed_const(crtc->base.mode.crtc_hdisplay); |
997 | wm->priority_mark_max.full = rfixed_div(wm->priority_mark_max, a); | 997 | wm->priority_mark_max.full = rfixed_div(wm->priority_mark_max, a); |
998 | wm->priority_mark_max.full = rfixed_ceil(wm->priority_mark_max); | ||
998 | 999 | ||
999 | /* Determine estimated width */ | 1000 | /* Determine estimated width */ |
1000 | estimated_width.full = tolerable_latency.full - wm->worst_case_latency.full; | 1001 | estimated_width.full = tolerable_latency.full - wm->worst_case_latency.full; |
1001 | estimated_width.full = rfixed_div(estimated_width, consumption_time); | 1002 | estimated_width.full = rfixed_div(estimated_width, consumption_time); |
1002 | if (rfixed_trunc(estimated_width) > crtc->base.mode.crtc_hdisplay) { | 1003 | if (rfixed_trunc(estimated_width) > crtc->base.mode.crtc_hdisplay) { |
1003 | wm->priority_mark.full = rfixed_const(10); | 1004 | wm->priority_mark.full = wm->priority_mark_max.full; |
1004 | } else { | 1005 | } else { |
1005 | a.full = rfixed_const(16); | 1006 | a.full = rfixed_const(16); |
1006 | wm->priority_mark.full = rfixed_div(estimated_width, a); | 1007 | wm->priority_mark.full = rfixed_div(estimated_width, a); |
1008 | wm->priority_mark.full = rfixed_ceil(wm->priority_mark); | ||
1007 | wm->priority_mark.full = wm->priority_mark_max.full - wm->priority_mark.full; | 1009 | wm->priority_mark.full = wm->priority_mark_max.full - wm->priority_mark.full; |
1008 | } | 1010 | } |
1009 | } | 1011 | } |