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path: root/drivers/gpu/drm/radeon/rs690.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/rs690.c')
-rw-r--r--drivers/gpu/drm/radeon/rs690.c41
1 files changed, 9 insertions, 32 deletions
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 06e2771aee5a..83b9174f76f2 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -129,27 +129,21 @@ void rs690_pm_info(struct radeon_device *rdev)
129 rdev->pm.sideport_bandwidth.full = rfixed_div(rdev->pm.sideport_bandwidth, tmp); 129 rdev->pm.sideport_bandwidth.full = rfixed_div(rdev->pm.sideport_bandwidth, tmp);
130} 130}
131 131
132void rs690_vram_info(struct radeon_device *rdev) 132void rs690_mc_init(struct radeon_device *rdev)
133{ 133{
134 fixed20_12 a; 134 fixed20_12 a;
135 u64 base;
135 136
136 rs400_gart_adjust_size(rdev); 137 rs400_gart_adjust_size(rdev);
137
138 rdev->mc.vram_is_ddr = true; 138 rdev->mc.vram_is_ddr = true;
139 rdev->mc.vram_width = 128; 139 rdev->mc.vram_width = 128;
140
141 rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE); 140 rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
142 rdev->mc.mc_vram_size = rdev->mc.real_vram_size; 141 rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
143
144 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 142 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
145 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); 143 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
146 144 rdev->mc.visible_vram_size = rdev->mc.aper_size;
147 if (rdev->mc.mc_vram_size > rdev->mc.aper_size) 145 base = RREG32_MC(R_000100_MCCFG_FB_LOCATION);
148 rdev->mc.mc_vram_size = rdev->mc.aper_size; 146 base = G_000100_MC_FB_START(base) << 16;
149
150 if (rdev->mc.real_vram_size > rdev->mc.aper_size)
151 rdev->mc.real_vram_size = rdev->mc.aper_size;
152
153 rs690_pm_info(rdev); 147 rs690_pm_info(rdev);
154 /* FIXME: we should enforce default clock in case GPU is not in 148 /* FIXME: we should enforce default clock in case GPU is not in
155 * default setup 149 * default setup
@@ -160,22 +154,9 @@ void rs690_vram_info(struct radeon_device *rdev)
160 a.full = rfixed_const(16); 154 a.full = rfixed_const(16);
161 /* core_bandwidth = sclk(Mhz) * 16 */ 155 /* core_bandwidth = sclk(Mhz) * 16 */
162 rdev->pm.core_bandwidth.full = rfixed_div(rdev->pm.sclk, a); 156 rdev->pm.core_bandwidth.full = rfixed_div(rdev->pm.sclk, a);
163}
164
165static int rs690_mc_init(struct radeon_device *rdev)
166{
167 int r;
168 u32 tmp;
169
170 /* Setup GPU memory space */
171 tmp = RREG32_MC(R_000100_MCCFG_FB_LOCATION);
172 rdev->mc.vram_location = G_000100_MC_FB_START(tmp) << 16;
173 rdev->mc.gtt_location = 0xFFFFFFFFUL;
174 r = radeon_mc_setup(rdev);
175 rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); 157 rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
176 if (r) 158 radeon_vram_location(rdev, &rdev->mc, base);
177 return r; 159 radeon_gtt_location(rdev, &rdev->mc);
178 return 0;
179} 160}
180 161
181void rs690_line_buffer_adjust(struct radeon_device *rdev, 162void rs690_line_buffer_adjust(struct radeon_device *rdev,
@@ -728,12 +709,8 @@ int rs690_init(struct radeon_device *rdev)
728 radeon_get_clock_info(rdev->ddev); 709 radeon_get_clock_info(rdev->ddev);
729 /* Initialize power management */ 710 /* Initialize power management */
730 radeon_pm_init(rdev); 711 radeon_pm_init(rdev);
731 /* Get vram informations */ 712 /* initialize memory controller */
732 rs690_vram_info(rdev); 713 rs690_mc_init(rdev);
733 /* Initialize memory controller (also test AGP) */
734 r = rs690_mc_init(rdev);
735 if (r)
736 return r;
737 rv515_debugfs(rdev); 714 rv515_debugfs(rdev);
738 /* Fence driver */ 715 /* Fence driver */
739 r = radeon_fence_driver_init(rdev); 716 r = radeon_fence_driver_init(rdev);