diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/rs600.c')
-rw-r--r-- | drivers/gpu/drm/radeon/rs600.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index 4f8ea4260572..d5255751e7b3 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c | |||
@@ -56,6 +56,7 @@ int rs600_mc_init(struct radeon_device *rdev) | |||
56 | rdev->mc.vram_location = G_000004_MC_FB_START(tmp) << 16; | 56 | rdev->mc.vram_location = G_000004_MC_FB_START(tmp) << 16; |
57 | rdev->mc.gtt_location = 0xffffffffUL; | 57 | rdev->mc.gtt_location = 0xffffffffUL; |
58 | r = radeon_mc_setup(rdev); | 58 | r = radeon_mc_setup(rdev); |
59 | rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); | ||
59 | if (r) | 60 | if (r) |
60 | return r; | 61 | return r; |
61 | return 0; | 62 | return 0; |
@@ -134,7 +135,8 @@ void rs600_hpd_init(struct radeon_device *rdev) | |||
134 | break; | 135 | break; |
135 | } | 136 | } |
136 | } | 137 | } |
137 | rs600_irq_set(rdev); | 138 | if (rdev->irq.installed) |
139 | rs600_irq_set(rdev); | ||
138 | } | 140 | } |
139 | 141 | ||
140 | void rs600_hpd_fini(struct radeon_device *rdev) | 142 | void rs600_hpd_fini(struct radeon_device *rdev) |
@@ -315,6 +317,11 @@ int rs600_irq_set(struct radeon_device *rdev) | |||
315 | u32 hpd2 = RREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL) & | 317 | u32 hpd2 = RREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL) & |
316 | ~S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(1); | 318 | ~S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(1); |
317 | 319 | ||
320 | if (!rdev->irq.installed) { | ||
321 | WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n"); | ||
322 | WREG32(R_000040_GEN_INT_CNTL, 0); | ||
323 | return -EINVAL; | ||
324 | } | ||
318 | if (rdev->irq.sw_int) { | 325 | if (rdev->irq.sw_int) { |
319 | tmp |= S_000040_SW_INT_EN(1); | 326 | tmp |= S_000040_SW_INT_EN(1); |
320 | } | 327 | } |
@@ -396,7 +403,7 @@ int rs600_irq_process(struct radeon_device *rdev) | |||
396 | } | 403 | } |
397 | while (status || r500_disp_int) { | 404 | while (status || r500_disp_int) { |
398 | /* SW interrupt */ | 405 | /* SW interrupt */ |
399 | if (G_000040_SW_INT_EN(status)) | 406 | if (G_000044_SW_INT(status)) |
400 | radeon_fence_process(rdev); | 407 | radeon_fence_process(rdev); |
401 | /* Vertical blank interrupts */ | 408 | /* Vertical blank interrupts */ |
402 | if (G_007EDC_LB_D1_VBLANK_INTERRUPT(r500_disp_int)) | 409 | if (G_007EDC_LB_D1_VBLANK_INTERRUPT(r500_disp_int)) |
@@ -553,6 +560,7 @@ static int rs600_startup(struct radeon_device *rdev) | |||
553 | return r; | 560 | return r; |
554 | /* Enable IRQ */ | 561 | /* Enable IRQ */ |
555 | rs600_irq_set(rdev); | 562 | rs600_irq_set(rdev); |
563 | rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL); | ||
556 | /* 1M ring buffer */ | 564 | /* 1M ring buffer */ |
557 | r = r100_cp_init(rdev, 1024 * 1024); | 565 | r = r100_cp_init(rdev, 1024 * 1024); |
558 | if (r) { | 566 | if (r) { |