diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_ttm.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_ttm.c | 61 |
1 files changed, 30 insertions, 31 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index bdb46c8cadd1..4ca7dfc44310 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c | |||
@@ -197,15 +197,17 @@ static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, | |||
197 | return 0; | 197 | return 0; |
198 | } | 198 | } |
199 | 199 | ||
200 | static uint32_t radeon_evict_flags(struct ttm_buffer_object *bo) | 200 | static void radeon_evict_flags(struct ttm_buffer_object *bo, |
201 | struct ttm_placement *placement) | ||
201 | { | 202 | { |
202 | uint32_t cur_placement = bo->mem.placement & ~TTM_PL_MASK_MEMTYPE; | 203 | struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo); |
203 | |||
204 | switch (bo->mem.mem_type) { | 204 | switch (bo->mem.mem_type) { |
205 | case TTM_PL_VRAM: | ||
206 | radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT); | ||
207 | break; | ||
208 | case TTM_PL_TT: | ||
205 | default: | 209 | default: |
206 | return (cur_placement & ~TTM_PL_MASK_CACHING) | | 210 | radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); |
207 | TTM_PL_FLAG_SYSTEM | | ||
208 | TTM_PL_FLAG_CACHED; | ||
209 | } | 211 | } |
210 | } | 212 | } |
211 | 213 | ||
@@ -283,14 +285,21 @@ static int radeon_move_vram_ram(struct ttm_buffer_object *bo, | |||
283 | struct radeon_device *rdev; | 285 | struct radeon_device *rdev; |
284 | struct ttm_mem_reg *old_mem = &bo->mem; | 286 | struct ttm_mem_reg *old_mem = &bo->mem; |
285 | struct ttm_mem_reg tmp_mem; | 287 | struct ttm_mem_reg tmp_mem; |
286 | uint32_t proposed_placement; | 288 | u32 placements; |
289 | struct ttm_placement placement; | ||
287 | int r; | 290 | int r; |
288 | 291 | ||
289 | rdev = radeon_get_rdev(bo->bdev); | 292 | rdev = radeon_get_rdev(bo->bdev); |
290 | tmp_mem = *new_mem; | 293 | tmp_mem = *new_mem; |
291 | tmp_mem.mm_node = NULL; | 294 | tmp_mem.mm_node = NULL; |
292 | proposed_placement = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING; | 295 | placement.fpfn = 0; |
293 | r = ttm_bo_mem_space(bo, proposed_placement, &tmp_mem, | 296 | placement.lpfn = 0; |
297 | placement.num_placement = 1; | ||
298 | placement.placement = &placements; | ||
299 | placement.num_busy_placement = 1; | ||
300 | placement.busy_placement = &placements; | ||
301 | placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; | ||
302 | r = ttm_bo_mem_space(bo, &placement, &tmp_mem, | ||
294 | interruptible, no_wait); | 303 | interruptible, no_wait); |
295 | if (unlikely(r)) { | 304 | if (unlikely(r)) { |
296 | return r; | 305 | return r; |
@@ -329,15 +338,21 @@ static int radeon_move_ram_vram(struct ttm_buffer_object *bo, | |||
329 | struct radeon_device *rdev; | 338 | struct radeon_device *rdev; |
330 | struct ttm_mem_reg *old_mem = &bo->mem; | 339 | struct ttm_mem_reg *old_mem = &bo->mem; |
331 | struct ttm_mem_reg tmp_mem; | 340 | struct ttm_mem_reg tmp_mem; |
332 | uint32_t proposed_flags; | 341 | struct ttm_placement placement; |
342 | u32 placements; | ||
333 | int r; | 343 | int r; |
334 | 344 | ||
335 | rdev = radeon_get_rdev(bo->bdev); | 345 | rdev = radeon_get_rdev(bo->bdev); |
336 | tmp_mem = *new_mem; | 346 | tmp_mem = *new_mem; |
337 | tmp_mem.mm_node = NULL; | 347 | tmp_mem.mm_node = NULL; |
338 | proposed_flags = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING; | 348 | placement.fpfn = 0; |
339 | r = ttm_bo_mem_space(bo, proposed_flags, &tmp_mem, | 349 | placement.lpfn = 0; |
340 | interruptible, no_wait); | 350 | placement.num_placement = 1; |
351 | placement.placement = &placements; | ||
352 | placement.num_busy_placement = 1; | ||
353 | placement.busy_placement = &placements; | ||
354 | placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; | ||
355 | r = ttm_bo_mem_space(bo, &placement, &tmp_mem, interruptible, no_wait); | ||
341 | if (unlikely(r)) { | 356 | if (unlikely(r)) { |
342 | return r; | 357 | return r; |
343 | } | 358 | } |
@@ -407,18 +422,6 @@ memcpy: | |||
407 | return r; | 422 | return r; |
408 | } | 423 | } |
409 | 424 | ||
410 | const uint32_t radeon_mem_prios[] = { | ||
411 | TTM_PL_VRAM, | ||
412 | TTM_PL_TT, | ||
413 | TTM_PL_SYSTEM, | ||
414 | }; | ||
415 | |||
416 | const uint32_t radeon_busy_prios[] = { | ||
417 | TTM_PL_TT, | ||
418 | TTM_PL_VRAM, | ||
419 | TTM_PL_SYSTEM, | ||
420 | }; | ||
421 | |||
422 | static int radeon_sync_obj_wait(void *sync_obj, void *sync_arg, | 425 | static int radeon_sync_obj_wait(void *sync_obj, void *sync_arg, |
423 | bool lazy, bool interruptible) | 426 | bool lazy, bool interruptible) |
424 | { | 427 | { |
@@ -446,10 +449,6 @@ static bool radeon_sync_obj_signaled(void *sync_obj, void *sync_arg) | |||
446 | } | 449 | } |
447 | 450 | ||
448 | static struct ttm_bo_driver radeon_bo_driver = { | 451 | static struct ttm_bo_driver radeon_bo_driver = { |
449 | .mem_type_prio = radeon_mem_prios, | ||
450 | .mem_busy_prio = radeon_busy_prios, | ||
451 | .num_mem_type_prio = ARRAY_SIZE(radeon_mem_prios), | ||
452 | .num_mem_busy_prio = ARRAY_SIZE(radeon_busy_prios), | ||
453 | .create_ttm_backend_entry = &radeon_create_ttm_backend_entry, | 452 | .create_ttm_backend_entry = &radeon_create_ttm_backend_entry, |
454 | .invalidate_caches = &radeon_invalidate_caches, | 453 | .invalidate_caches = &radeon_invalidate_caches, |
455 | .init_mem_type = &radeon_init_mem_type, | 454 | .init_mem_type = &radeon_init_mem_type, |
@@ -483,7 +482,7 @@ int radeon_ttm_init(struct radeon_device *rdev) | |||
483 | return r; | 482 | return r; |
484 | } | 483 | } |
485 | r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM, | 484 | r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM, |
486 | 0, rdev->mc.real_vram_size >> PAGE_SHIFT); | 485 | rdev->mc.real_vram_size >> PAGE_SHIFT); |
487 | if (r) { | 486 | if (r) { |
488 | DRM_ERROR("Failed initializing VRAM heap.\n"); | 487 | DRM_ERROR("Failed initializing VRAM heap.\n"); |
489 | return r; | 488 | return r; |
@@ -506,7 +505,7 @@ int radeon_ttm_init(struct radeon_device *rdev) | |||
506 | DRM_INFO("radeon: %uM of VRAM memory ready\n", | 505 | DRM_INFO("radeon: %uM of VRAM memory ready\n", |
507 | (unsigned)rdev->mc.real_vram_size / (1024 * 1024)); | 506 | (unsigned)rdev->mc.real_vram_size / (1024 * 1024)); |
508 | r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT, | 507 | r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT, |
509 | 0, rdev->mc.gtt_size >> PAGE_SHIFT); | 508 | rdev->mc.gtt_size >> PAGE_SHIFT); |
510 | if (r) { | 509 | if (r) { |
511 | DRM_ERROR("Failed initializing GTT heap.\n"); | 510 | DRM_ERROR("Failed initializing GTT heap.\n"); |
512 | return r; | 511 | return r; |