diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_reg.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_reg.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h index b8116401ffae..6d0a009dd4a1 100644 --- a/drivers/gpu/drm/radeon/radeon_reg.h +++ b/drivers/gpu/drm/radeon/radeon_reg.h | |||
| @@ -887,6 +887,7 @@ | |||
| 887 | # define RADEON_FP_PANEL_FORMAT (1 << 3) | 887 | # define RADEON_FP_PANEL_FORMAT (1 << 3) |
| 888 | # define RADEON_FP_EN_TMDS (1 << 7) | 888 | # define RADEON_FP_EN_TMDS (1 << 7) |
| 889 | # define RADEON_FP_DETECT_SENSE (1 << 8) | 889 | # define RADEON_FP_DETECT_SENSE (1 << 8) |
| 890 | # define RADEON_FP_DETECT_INT_POL (1 << 9) | ||
| 890 | # define R200_FP_SOURCE_SEL_MASK (3 << 10) | 891 | # define R200_FP_SOURCE_SEL_MASK (3 << 10) |
| 891 | # define R200_FP_SOURCE_SEL_CRTC1 (0 << 10) | 892 | # define R200_FP_SOURCE_SEL_CRTC1 (0 << 10) |
| 892 | # define R200_FP_SOURCE_SEL_CRTC2 (1 << 10) | 893 | # define R200_FP_SOURCE_SEL_CRTC2 (1 << 10) |
| @@ -894,6 +895,7 @@ | |||
| 894 | # define R200_FP_SOURCE_SEL_TRANS (3 << 10) | 895 | # define R200_FP_SOURCE_SEL_TRANS (3 << 10) |
| 895 | # define RADEON_FP_SEL_CRTC1 (0 << 13) | 896 | # define RADEON_FP_SEL_CRTC1 (0 << 13) |
| 896 | # define RADEON_FP_SEL_CRTC2 (1 << 13) | 897 | # define RADEON_FP_SEL_CRTC2 (1 << 13) |
| 898 | # define R300_HPD_SEL(x) ((x) << 13) | ||
| 897 | # define RADEON_FP_CRTC_DONT_SHADOW_HPAR (1 << 15) | 899 | # define RADEON_FP_CRTC_DONT_SHADOW_HPAR (1 << 15) |
| 898 | # define RADEON_FP_CRTC_DONT_SHADOW_VPAR (1 << 16) | 900 | # define RADEON_FP_CRTC_DONT_SHADOW_VPAR (1 << 16) |
| 899 | # define RADEON_FP_CRTC_DONT_SHADOW_HEND (1 << 17) | 901 | # define RADEON_FP_CRTC_DONT_SHADOW_HEND (1 << 17) |
| @@ -909,6 +911,7 @@ | |||
| 909 | # define RADEON_FP2_ON (1 << 2) | 911 | # define RADEON_FP2_ON (1 << 2) |
| 910 | # define RADEON_FP2_PANEL_FORMAT (1 << 3) | 912 | # define RADEON_FP2_PANEL_FORMAT (1 << 3) |
| 911 | # define RADEON_FP2_DETECT_SENSE (1 << 8) | 913 | # define RADEON_FP2_DETECT_SENSE (1 << 8) |
| 914 | # define RADEON_FP2_DETECT_INT_POL (1 << 9) | ||
| 912 | # define R200_FP2_SOURCE_SEL_MASK (3 << 10) | 915 | # define R200_FP2_SOURCE_SEL_MASK (3 << 10) |
| 913 | # define R200_FP2_SOURCE_SEL_CRTC1 (0 << 10) | 916 | # define R200_FP2_SOURCE_SEL_CRTC1 (0 << 10) |
| 914 | # define R200_FP2_SOURCE_SEL_CRTC2 (1 << 10) | 917 | # define R200_FP2_SOURCE_SEL_CRTC2 (1 << 10) |
| @@ -988,14 +991,20 @@ | |||
| 988 | 991 | ||
| 989 | #define RADEON_GEN_INT_CNTL 0x0040 | 992 | #define RADEON_GEN_INT_CNTL 0x0040 |
| 990 | # define RADEON_CRTC_VBLANK_MASK (1 << 0) | 993 | # define RADEON_CRTC_VBLANK_MASK (1 << 0) |
| 994 | # define RADEON_FP_DETECT_MASK (1 << 4) | ||
| 991 | # define RADEON_CRTC2_VBLANK_MASK (1 << 9) | 995 | # define RADEON_CRTC2_VBLANK_MASK (1 << 9) |
| 996 | # define RADEON_FP2_DETECT_MASK (1 << 10) | ||
| 992 | # define RADEON_SW_INT_ENABLE (1 << 25) | 997 | # define RADEON_SW_INT_ENABLE (1 << 25) |
| 993 | #define RADEON_GEN_INT_STATUS 0x0044 | 998 | #define RADEON_GEN_INT_STATUS 0x0044 |
| 994 | # define AVIVO_DISPLAY_INT_STATUS (1 << 0) | 999 | # define AVIVO_DISPLAY_INT_STATUS (1 << 0) |
| 995 | # define RADEON_CRTC_VBLANK_STAT (1 << 0) | 1000 | # define RADEON_CRTC_VBLANK_STAT (1 << 0) |
| 996 | # define RADEON_CRTC_VBLANK_STAT_ACK (1 << 0) | 1001 | # define RADEON_CRTC_VBLANK_STAT_ACK (1 << 0) |
| 1002 | # define RADEON_FP_DETECT_STAT (1 << 4) | ||
| 1003 | # define RADEON_FP_DETECT_STAT_ACK (1 << 4) | ||
| 997 | # define RADEON_CRTC2_VBLANK_STAT (1 << 9) | 1004 | # define RADEON_CRTC2_VBLANK_STAT (1 << 9) |
| 998 | # define RADEON_CRTC2_VBLANK_STAT_ACK (1 << 9) | 1005 | # define RADEON_CRTC2_VBLANK_STAT_ACK (1 << 9) |
| 1006 | # define RADEON_FP2_DETECT_STAT (1 << 10) | ||
| 1007 | # define RADEON_FP2_DETECT_STAT_ACK (1 << 10) | ||
| 999 | # define RADEON_SW_INT_FIRE (1 << 26) | 1008 | # define RADEON_SW_INT_FIRE (1 << 26) |
| 1000 | # define RADEON_SW_INT_TEST (1 << 25) | 1009 | # define RADEON_SW_INT_TEST (1 << 25) |
| 1001 | # define RADEON_SW_INT_TEST_ACK (1 << 25) | 1010 | # define RADEON_SW_INT_TEST_ACK (1 << 25) |