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path: root/drivers/gpu/drm/radeon/radeon_mode.h
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Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_mode.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h18
1 files changed, 16 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 95696aa57ac8..71aea4037e90 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -66,6 +66,12 @@ enum radeon_tv_std {
66 TV_STD_PAL_N, 66 TV_STD_PAL_N,
67}; 67};
68 68
69enum radeon_underscan_type {
70 UNDERSCAN_OFF,
71 UNDERSCAN_ON,
72 UNDERSCAN_AUTO,
73};
74
69enum radeon_hpd_id { 75enum radeon_hpd_id {
70 RADEON_HPD_1 = 0, 76 RADEON_HPD_1 = 0,
71 RADEON_HPD_2, 77 RADEON_HPD_2,
@@ -226,10 +232,12 @@ struct radeon_mode_info {
226 struct drm_property *coherent_mode_property; 232 struct drm_property *coherent_mode_property;
227 /* DAC enable load detect */ 233 /* DAC enable load detect */
228 struct drm_property *load_detect_property; 234 struct drm_property *load_detect_property;
229 /* TV standard load detect */ 235 /* TV standard */
230 struct drm_property *tv_std_property; 236 struct drm_property *tv_std_property;
231 /* legacy TMDS PLL detect */ 237 /* legacy TMDS PLL detect */
232 struct drm_property *tmds_pll_property; 238 struct drm_property *tmds_pll_property;
239 /* underscan */
240 struct drm_property *underscan_property;
233 /* hardcoded DFP edid from BIOS */ 241 /* hardcoded DFP edid from BIOS */
234 struct edid *bios_hardcoded_edid; 242 struct edid *bios_hardcoded_edid;
235 243
@@ -266,6 +274,8 @@ struct radeon_crtc {
266 uint32_t legacy_display_base_addr; 274 uint32_t legacy_display_base_addr;
267 uint32_t legacy_cursor_offset; 275 uint32_t legacy_cursor_offset;
268 enum radeon_rmx_type rmx_type; 276 enum radeon_rmx_type rmx_type;
277 u8 h_border;
278 u8 v_border;
269 fixed20_12 vsc; 279 fixed20_12 vsc;
270 fixed20_12 hsc; 280 fixed20_12 hsc;
271 struct drm_display_mode native_mode; 281 struct drm_display_mode native_mode;
@@ -354,6 +364,7 @@ struct radeon_encoder {
354 uint32_t flags; 364 uint32_t flags;
355 uint32_t pixel_clock; 365 uint32_t pixel_clock;
356 enum radeon_rmx_type rmx_type; 366 enum radeon_rmx_type rmx_type;
367 enum radeon_underscan_type underscan_type;
357 struct drm_display_mode native_mode; 368 struct drm_display_mode native_mode;
358 void *enc_priv; 369 void *enc_priv;
359 int audio_polling_active; 370 int audio_polling_active;
@@ -392,7 +403,7 @@ struct radeon_connector {
392 uint32_t connector_id; 403 uint32_t connector_id;
393 uint32_t devices; 404 uint32_t devices;
394 struct radeon_i2c_chan *ddc_bus; 405 struct radeon_i2c_chan *ddc_bus;
395 /* some systems have a an hdmi and vga port with a shared ddc line */ 406 /* some systems have an hdmi and vga port with a shared ddc line */
396 bool shared_ddc; 407 bool shared_ddc;
397 bool use_digital; 408 bool use_digital;
398 /* we need to mind the EDID between detect 409 /* we need to mind the EDID between detect
@@ -414,6 +425,9 @@ radeon_combios_get_tv_info(struct radeon_device *rdev);
414extern enum radeon_tv_std 425extern enum radeon_tv_std
415radeon_atombios_get_tv_info(struct radeon_device *rdev); 426radeon_atombios_get_tv_info(struct radeon_device *rdev);
416 427
428extern struct drm_connector *
429radeon_get_connector_for_encoder(struct drm_encoder *encoder);
430
417extern void radeon_connector_hotplug(struct drm_connector *connector); 431extern void radeon_connector_hotplug(struct drm_connector *connector);
418extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector); 432extern bool radeon_dp_needs_link_train(struct radeon_connector *radeon_connector);
419extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector, 433extern int radeon_dp_mode_valid_helper(struct radeon_connector *radeon_connector,