diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_encoders.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_encoders.c | 142 |
1 files changed, 71 insertions, 71 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c index bc926ea0a530..c52fc3080b67 100644 --- a/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_encoders.c | |||
@@ -302,7 +302,7 @@ static bool radeon_atom_mode_fixup(struct drm_encoder *encoder, | |||
302 | } | 302 | } |
303 | 303 | ||
304 | if (ASIC_IS_DCE3(rdev) && | 304 | if (ASIC_IS_DCE3(rdev) && |
305 | (radeon_encoder->active_device & (ATOM_DEVICE_DFP_SUPPORT))) { | 305 | (radeon_encoder->active_device & (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT))) { |
306 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); | 306 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); |
307 | radeon_dp_set_link_config(connector, mode); | 307 | radeon_dp_set_link_config(connector, mode); |
308 | } | 308 | } |
@@ -317,12 +317,8 @@ atombios_dac_setup(struct drm_encoder *encoder, int action) | |||
317 | struct radeon_device *rdev = dev->dev_private; | 317 | struct radeon_device *rdev = dev->dev_private; |
318 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 318 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
319 | DAC_ENCODER_CONTROL_PS_ALLOCATION args; | 319 | DAC_ENCODER_CONTROL_PS_ALLOCATION args; |
320 | int index = 0, num = 0; | 320 | int index = 0; |
321 | struct radeon_encoder_atom_dac *dac_info = radeon_encoder->enc_priv; | 321 | struct radeon_encoder_atom_dac *dac_info = radeon_encoder->enc_priv; |
322 | enum radeon_tv_std tv_std = TV_STD_NTSC; | ||
323 | |||
324 | if (dac_info->tv_std) | ||
325 | tv_std = dac_info->tv_std; | ||
326 | 322 | ||
327 | memset(&args, 0, sizeof(args)); | 323 | memset(&args, 0, sizeof(args)); |
328 | 324 | ||
@@ -330,12 +326,10 @@ atombios_dac_setup(struct drm_encoder *encoder, int action) | |||
330 | case ENCODER_OBJECT_ID_INTERNAL_DAC1: | 326 | case ENCODER_OBJECT_ID_INTERNAL_DAC1: |
331 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: | 327 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: |
332 | index = GetIndexIntoMasterTable(COMMAND, DAC1EncoderControl); | 328 | index = GetIndexIntoMasterTable(COMMAND, DAC1EncoderControl); |
333 | num = 1; | ||
334 | break; | 329 | break; |
335 | case ENCODER_OBJECT_ID_INTERNAL_DAC2: | 330 | case ENCODER_OBJECT_ID_INTERNAL_DAC2: |
336 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: | 331 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: |
337 | index = GetIndexIntoMasterTable(COMMAND, DAC2EncoderControl); | 332 | index = GetIndexIntoMasterTable(COMMAND, DAC2EncoderControl); |
338 | num = 2; | ||
339 | break; | 333 | break; |
340 | } | 334 | } |
341 | 335 | ||
@@ -346,7 +340,7 @@ atombios_dac_setup(struct drm_encoder *encoder, int action) | |||
346 | else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT)) | 340 | else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT)) |
347 | args.ucDacStandard = ATOM_DAC1_CV; | 341 | args.ucDacStandard = ATOM_DAC1_CV; |
348 | else { | 342 | else { |
349 | switch (tv_std) { | 343 | switch (dac_info->tv_std) { |
350 | case TV_STD_PAL: | 344 | case TV_STD_PAL: |
351 | case TV_STD_PAL_M: | 345 | case TV_STD_PAL_M: |
352 | case TV_STD_SCART_PAL: | 346 | case TV_STD_SCART_PAL: |
@@ -377,10 +371,6 @@ atombios_tv_setup(struct drm_encoder *encoder, int action) | |||
377 | TV_ENCODER_CONTROL_PS_ALLOCATION args; | 371 | TV_ENCODER_CONTROL_PS_ALLOCATION args; |
378 | int index = 0; | 372 | int index = 0; |
379 | struct radeon_encoder_atom_dac *dac_info = radeon_encoder->enc_priv; | 373 | struct radeon_encoder_atom_dac *dac_info = radeon_encoder->enc_priv; |
380 | enum radeon_tv_std tv_std = TV_STD_NTSC; | ||
381 | |||
382 | if (dac_info->tv_std) | ||
383 | tv_std = dac_info->tv_std; | ||
384 | 374 | ||
385 | memset(&args, 0, sizeof(args)); | 375 | memset(&args, 0, sizeof(args)); |
386 | 376 | ||
@@ -391,7 +381,7 @@ atombios_tv_setup(struct drm_encoder *encoder, int action) | |||
391 | if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT)) | 381 | if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT)) |
392 | args.sTVEncoder.ucTvStandard = ATOM_TV_CV; | 382 | args.sTVEncoder.ucTvStandard = ATOM_TV_CV; |
393 | else { | 383 | else { |
394 | switch (tv_std) { | 384 | switch (dac_info->tv_std) { |
395 | case TV_STD_NTSC: | 385 | case TV_STD_NTSC: |
396 | args.sTVEncoder.ucTvStandard = ATOM_TV_NTSC; | 386 | args.sTVEncoder.ucTvStandard = ATOM_TV_NTSC; |
397 | break; | 387 | break; |
@@ -519,7 +509,8 @@ atombios_digital_setup(struct drm_encoder *encoder, int action) | |||
519 | break; | 509 | break; |
520 | } | 510 | } |
521 | 511 | ||
522 | atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev); | 512 | if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) |
513 | return; | ||
523 | 514 | ||
524 | switch (frev) { | 515 | switch (frev) { |
525 | case 1: | 516 | case 1: |
@@ -593,7 +584,6 @@ atombios_digital_setup(struct drm_encoder *encoder, int action) | |||
593 | } | 584 | } |
594 | 585 | ||
595 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | 586 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
596 | r600_hdmi_enable(encoder, hdmi_detected); | ||
597 | } | 587 | } |
598 | 588 | ||
599 | int | 589 | int |
@@ -708,7 +698,7 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action) | |||
708 | struct radeon_connector_atom_dig *dig_connector = | 698 | struct radeon_connector_atom_dig *dig_connector = |
709 | radeon_get_atom_connector_priv_from_encoder(encoder); | 699 | radeon_get_atom_connector_priv_from_encoder(encoder); |
710 | union dig_encoder_control args; | 700 | union dig_encoder_control args; |
711 | int index = 0, num = 0; | 701 | int index = 0; |
712 | uint8_t frev, crev; | 702 | uint8_t frev, crev; |
713 | 703 | ||
714 | if (!dig || !dig_connector) | 704 | if (!dig || !dig_connector) |
@@ -724,9 +714,9 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action) | |||
724 | else | 714 | else |
725 | index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl); | 715 | index = GetIndexIntoMasterTable(COMMAND, DIG1EncoderControl); |
726 | } | 716 | } |
727 | num = dig->dig_encoder + 1; | ||
728 | 717 | ||
729 | atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev); | 718 | if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) |
719 | return; | ||
730 | 720 | ||
731 | args.v1.ucAction = action; | 721 | args.v1.ucAction = action; |
732 | args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); | 722 | args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); |
@@ -785,7 +775,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
785 | struct drm_connector *connector; | 775 | struct drm_connector *connector; |
786 | struct radeon_connector *radeon_connector; | 776 | struct radeon_connector *radeon_connector; |
787 | union dig_transmitter_control args; | 777 | union dig_transmitter_control args; |
788 | int index = 0, num = 0; | 778 | int index = 0; |
789 | uint8_t frev, crev; | 779 | uint8_t frev, crev; |
790 | bool is_dp = false; | 780 | bool is_dp = false; |
791 | int pll_id = 0; | 781 | int pll_id = 0; |
@@ -814,7 +804,8 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
814 | } | 804 | } |
815 | } | 805 | } |
816 | 806 | ||
817 | atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev); | 807 | if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) |
808 | return; | ||
818 | 809 | ||
819 | args.v1.ucAction = action; | 810 | args.v1.ucAction = action; |
820 | if (action == ATOM_TRANSMITTER_ACTION_INIT) { | 811 | if (action == ATOM_TRANSMITTER_ACTION_INIT) { |
@@ -860,15 +851,12 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
860 | switch (radeon_encoder->encoder_id) { | 851 | switch (radeon_encoder->encoder_id) { |
861 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: | 852 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: |
862 | args.v3.acConfig.ucTransmitterSel = 0; | 853 | args.v3.acConfig.ucTransmitterSel = 0; |
863 | num = 0; | ||
864 | break; | 854 | break; |
865 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: | 855 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: |
866 | args.v3.acConfig.ucTransmitterSel = 1; | 856 | args.v3.acConfig.ucTransmitterSel = 1; |
867 | num = 1; | ||
868 | break; | 857 | break; |
869 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: | 858 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: |
870 | args.v3.acConfig.ucTransmitterSel = 2; | 859 | args.v3.acConfig.ucTransmitterSel = 2; |
871 | num = 2; | ||
872 | break; | 860 | break; |
873 | } | 861 | } |
874 | 862 | ||
@@ -879,23 +867,19 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
879 | args.v3.acConfig.fCoherentMode = 1; | 867 | args.v3.acConfig.fCoherentMode = 1; |
880 | } | 868 | } |
881 | } else if (ASIC_IS_DCE32(rdev)) { | 869 | } else if (ASIC_IS_DCE32(rdev)) { |
882 | if (dig->dig_encoder == 1) | 870 | args.v2.acConfig.ucEncoderSel = dig->dig_encoder; |
883 | args.v2.acConfig.ucEncoderSel = 1; | ||
884 | if (dig_connector->linkb) | 871 | if (dig_connector->linkb) |
885 | args.v2.acConfig.ucLinkSel = 1; | 872 | args.v2.acConfig.ucLinkSel = 1; |
886 | 873 | ||
887 | switch (radeon_encoder->encoder_id) { | 874 | switch (radeon_encoder->encoder_id) { |
888 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: | 875 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: |
889 | args.v2.acConfig.ucTransmitterSel = 0; | 876 | args.v2.acConfig.ucTransmitterSel = 0; |
890 | num = 0; | ||
891 | break; | 877 | break; |
892 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: | 878 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: |
893 | args.v2.acConfig.ucTransmitterSel = 1; | 879 | args.v2.acConfig.ucTransmitterSel = 1; |
894 | num = 1; | ||
895 | break; | 880 | break; |
896 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: | 881 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: |
897 | args.v2.acConfig.ucTransmitterSel = 2; | 882 | args.v2.acConfig.ucTransmitterSel = 2; |
898 | num = 2; | ||
899 | break; | 883 | break; |
900 | } | 884 | } |
901 | 885 | ||
@@ -913,31 +897,25 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
913 | else | 897 | else |
914 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER; | 898 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER; |
915 | 899 | ||
916 | switch (radeon_encoder->encoder_id) { | 900 | if ((rdev->flags & RADEON_IS_IGP) && |
917 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: | 901 | (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_UNIPHY)) { |
918 | if (rdev->flags & RADEON_IS_IGP) { | 902 | if (is_dp || (radeon_encoder->pixel_clock <= 165000)) { |
919 | if (radeon_encoder->pixel_clock > 165000) { | 903 | if (dig_connector->igp_lane_info & 0x1) |
920 | if (dig_connector->igp_lane_info & 0x3) | 904 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3; |
921 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7; | 905 | else if (dig_connector->igp_lane_info & 0x2) |
922 | else if (dig_connector->igp_lane_info & 0xc) | 906 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7; |
923 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15; | 907 | else if (dig_connector->igp_lane_info & 0x4) |
924 | } else { | 908 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11; |
925 | if (dig_connector->igp_lane_info & 0x1) | 909 | else if (dig_connector->igp_lane_info & 0x8) |
926 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3; | 910 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15; |
927 | else if (dig_connector->igp_lane_info & 0x2) | 911 | } else { |
928 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7; | 912 | if (dig_connector->igp_lane_info & 0x3) |
929 | else if (dig_connector->igp_lane_info & 0x4) | 913 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7; |
930 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11; | 914 | else if (dig_connector->igp_lane_info & 0xc) |
931 | else if (dig_connector->igp_lane_info & 0x8) | 915 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15; |
932 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15; | ||
933 | } | ||
934 | } | 916 | } |
935 | break; | ||
936 | } | 917 | } |
937 | 918 | ||
938 | if (radeon_encoder->pixel_clock > 165000) | ||
939 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_8LANE_LINK; | ||
940 | |||
941 | if (dig_connector->linkb) | 919 | if (dig_connector->linkb) |
942 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB; | 920 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB; |
943 | else | 921 | else |
@@ -948,6 +926,8 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
948 | else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { | 926 | else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { |
949 | if (dig->coherent_mode) | 927 | if (dig->coherent_mode) |
950 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT; | 928 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_COHERENT; |
929 | if (radeon_encoder->pixel_clock > 165000) | ||
930 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_8LANE_LINK; | ||
951 | } | 931 | } |
952 | } | 932 | } |
953 | 933 | ||
@@ -1054,16 +1034,25 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode) | |||
1054 | if (is_dig) { | 1034 | if (is_dig) { |
1055 | switch (mode) { | 1035 | switch (mode) { |
1056 | case DRM_MODE_DPMS_ON: | 1036 | case DRM_MODE_DPMS_ON: |
1057 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0); | 1037 | if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) { |
1058 | { | ||
1059 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); | 1038 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); |
1039 | |||
1060 | dp_link_train(encoder, connector); | 1040 | dp_link_train(encoder, connector); |
1041 | if (ASIC_IS_DCE4(rdev)) | ||
1042 | atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_ON); | ||
1061 | } | 1043 | } |
1044 | if (!ASIC_IS_DCE4(rdev)) | ||
1045 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0); | ||
1062 | break; | 1046 | break; |
1063 | case DRM_MODE_DPMS_STANDBY: | 1047 | case DRM_MODE_DPMS_STANDBY: |
1064 | case DRM_MODE_DPMS_SUSPEND: | 1048 | case DRM_MODE_DPMS_SUSPEND: |
1065 | case DRM_MODE_DPMS_OFF: | 1049 | case DRM_MODE_DPMS_OFF: |
1066 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE_OUTPUT, 0, 0); | 1050 | if (!ASIC_IS_DCE4(rdev)) |
1051 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE_OUTPUT, 0, 0); | ||
1052 | if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) { | ||
1053 | if (ASIC_IS_DCE4(rdev)) | ||
1054 | atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_OFF); | ||
1055 | } | ||
1067 | break; | 1056 | break; |
1068 | } | 1057 | } |
1069 | } else { | 1058 | } else { |
@@ -1104,7 +1093,8 @@ atombios_set_encoder_crtc_source(struct drm_encoder *encoder) | |||
1104 | 1093 | ||
1105 | memset(&args, 0, sizeof(args)); | 1094 | memset(&args, 0, sizeof(args)); |
1106 | 1095 | ||
1107 | atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev); | 1096 | if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) |
1097 | return; | ||
1108 | 1098 | ||
1109 | switch (frev) { | 1099 | switch (frev) { |
1110 | case 1: | 1100 | case 1: |
@@ -1216,6 +1206,9 @@ atombios_set_encoder_crtc_source(struct drm_encoder *encoder) | |||
1216 | } | 1206 | } |
1217 | 1207 | ||
1218 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | 1208 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
1209 | |||
1210 | /* update scratch regs with new routing */ | ||
1211 | radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); | ||
1219 | } | 1212 | } |
1220 | 1213 | ||
1221 | static void | 1214 | static void |
@@ -1326,19 +1319,9 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder, | |||
1326 | struct drm_device *dev = encoder->dev; | 1319 | struct drm_device *dev = encoder->dev; |
1327 | struct radeon_device *rdev = dev->dev_private; | 1320 | struct radeon_device *rdev = dev->dev_private; |
1328 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 1321 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
1329 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); | ||
1330 | 1322 | ||
1331 | if (radeon_encoder->active_device & | ||
1332 | (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) { | ||
1333 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; | ||
1334 | if (dig) | ||
1335 | dig->dig_encoder = radeon_atom_pick_dig_encoder(encoder); | ||
1336 | } | ||
1337 | radeon_encoder->pixel_clock = adjusted_mode->clock; | 1323 | radeon_encoder->pixel_clock = adjusted_mode->clock; |
1338 | 1324 | ||
1339 | radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); | ||
1340 | atombios_set_encoder_crtc_source(encoder); | ||
1341 | |||
1342 | if (ASIC_IS_AVIVO(rdev)) { | 1325 | if (ASIC_IS_AVIVO(rdev)) { |
1343 | if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT | ATOM_DEVICE_TV_SUPPORT)) | 1326 | if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT | ATOM_DEVICE_TV_SUPPORT)) |
1344 | atombios_yuv_setup(encoder, true); | 1327 | atombios_yuv_setup(encoder, true); |
@@ -1396,9 +1379,10 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder, | |||
1396 | } | 1379 | } |
1397 | atombios_apply_encoder_quirks(encoder, adjusted_mode); | 1380 | atombios_apply_encoder_quirks(encoder, adjusted_mode); |
1398 | 1381 | ||
1399 | /* XXX */ | 1382 | if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI) { |
1400 | if (!ASIC_IS_DCE4(rdev)) | 1383 | r600_hdmi_enable(encoder); |
1401 | r600_hdmi_setmode(encoder, adjusted_mode); | 1384 | r600_hdmi_setmode(encoder, adjusted_mode); |
1385 | } | ||
1402 | } | 1386 | } |
1403 | 1387 | ||
1404 | static bool | 1388 | static bool |
@@ -1418,7 +1402,8 @@ atombios_dac_load_detect(struct drm_encoder *encoder, struct drm_connector *conn | |||
1418 | 1402 | ||
1419 | memset(&args, 0, sizeof(args)); | 1403 | memset(&args, 0, sizeof(args)); |
1420 | 1404 | ||
1421 | atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev); | 1405 | if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) |
1406 | return false; | ||
1422 | 1407 | ||
1423 | args.sDacload.ucMisc = 0; | 1408 | args.sDacload.ucMisc = 0; |
1424 | 1409 | ||
@@ -1492,8 +1477,20 @@ radeon_atom_dac_detect(struct drm_encoder *encoder, struct drm_connector *connec | |||
1492 | 1477 | ||
1493 | static void radeon_atom_encoder_prepare(struct drm_encoder *encoder) | 1478 | static void radeon_atom_encoder_prepare(struct drm_encoder *encoder) |
1494 | { | 1479 | { |
1480 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | ||
1481 | |||
1482 | if (radeon_encoder->active_device & | ||
1483 | (ATOM_DEVICE_DFP_SUPPORT | ATOM_DEVICE_LCD_SUPPORT)) { | ||
1484 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; | ||
1485 | if (dig) | ||
1486 | dig->dig_encoder = radeon_atom_pick_dig_encoder(encoder); | ||
1487 | } | ||
1488 | |||
1495 | radeon_atom_output_lock(encoder, true); | 1489 | radeon_atom_output_lock(encoder, true); |
1496 | radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); | 1490 | radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); |
1491 | |||
1492 | /* this is needed for the pll/ss setup to work correctly in some cases */ | ||
1493 | atombios_set_encoder_crtc_source(encoder); | ||
1497 | } | 1494 | } |
1498 | 1495 | ||
1499 | static void radeon_atom_encoder_commit(struct drm_encoder *encoder) | 1496 | static void radeon_atom_encoder_commit(struct drm_encoder *encoder) |
@@ -1509,6 +1506,8 @@ static void radeon_atom_encoder_disable(struct drm_encoder *encoder) | |||
1509 | radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); | 1506 | radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); |
1510 | 1507 | ||
1511 | if (radeon_encoder_is_digital(encoder)) { | 1508 | if (radeon_encoder_is_digital(encoder)) { |
1509 | if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI) | ||
1510 | r600_hdmi_disable(encoder); | ||
1512 | dig = radeon_encoder->enc_priv; | 1511 | dig = radeon_encoder->enc_priv; |
1513 | dig->dig_encoder = -1; | 1512 | dig->dig_encoder = -1; |
1514 | } | 1513 | } |
@@ -1549,12 +1548,14 @@ static const struct drm_encoder_funcs radeon_atom_enc_funcs = { | |||
1549 | struct radeon_encoder_atom_dac * | 1548 | struct radeon_encoder_atom_dac * |
1550 | radeon_atombios_set_dac_info(struct radeon_encoder *radeon_encoder) | 1549 | radeon_atombios_set_dac_info(struct radeon_encoder *radeon_encoder) |
1551 | { | 1550 | { |
1551 | struct drm_device *dev = radeon_encoder->base.dev; | ||
1552 | struct radeon_device *rdev = dev->dev_private; | ||
1552 | struct radeon_encoder_atom_dac *dac = kzalloc(sizeof(struct radeon_encoder_atom_dac), GFP_KERNEL); | 1553 | struct radeon_encoder_atom_dac *dac = kzalloc(sizeof(struct radeon_encoder_atom_dac), GFP_KERNEL); |
1553 | 1554 | ||
1554 | if (!dac) | 1555 | if (!dac) |
1555 | return NULL; | 1556 | return NULL; |
1556 | 1557 | ||
1557 | dac->tv_std = TV_STD_NTSC; | 1558 | dac->tv_std = radeon_atombios_get_tv_info(rdev); |
1558 | return dac; | 1559 | return dac; |
1559 | } | 1560 | } |
1560 | 1561 | ||
@@ -1632,6 +1633,7 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t su | |||
1632 | break; | 1633 | break; |
1633 | case ENCODER_OBJECT_ID_INTERNAL_DAC1: | 1634 | case ENCODER_OBJECT_ID_INTERNAL_DAC1: |
1634 | drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_DAC); | 1635 | drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_DAC); |
1636 | radeon_encoder->enc_priv = radeon_atombios_set_dac_info(radeon_encoder); | ||
1635 | drm_encoder_helper_add(encoder, &radeon_atom_dac_helper_funcs); | 1637 | drm_encoder_helper_add(encoder, &radeon_atom_dac_helper_funcs); |
1636 | break; | 1638 | break; |
1637 | case ENCODER_OBJECT_ID_INTERNAL_DAC2: | 1639 | case ENCODER_OBJECT_ID_INTERNAL_DAC2: |
@@ -1659,6 +1661,4 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t su | |||
1659 | drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs); | 1661 | drm_encoder_helper_add(encoder, &radeon_atom_dig_helper_funcs); |
1660 | break; | 1662 | break; |
1661 | } | 1663 | } |
1662 | |||
1663 | r600_hdmi_init(encoder); | ||
1664 | } | 1664 | } |