diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_display.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_display.c | 56 |
1 files changed, 36 insertions, 20 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 0ec491ead2ff..7e17a362b54b 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -278,7 +278,7 @@ static void radeon_print_display_setup(struct drm_device *dev) | |||
278 | DRM_INFO(" %s\n", connector_names[connector->connector_type]); | 278 | DRM_INFO(" %s\n", connector_names[connector->connector_type]); |
279 | if (radeon_connector->hpd.hpd != RADEON_HPD_NONE) | 279 | if (radeon_connector->hpd.hpd != RADEON_HPD_NONE) |
280 | DRM_INFO(" %s\n", hpd_names[radeon_connector->hpd.hpd]); | 280 | DRM_INFO(" %s\n", hpd_names[radeon_connector->hpd.hpd]); |
281 | if (radeon_connector->ddc_bus) | 281 | if (radeon_connector->ddc_bus) { |
282 | DRM_INFO(" DDC: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", | 282 | DRM_INFO(" DDC: 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x 0x%x\n", |
283 | radeon_connector->ddc_bus->rec.mask_clk_reg, | 283 | radeon_connector->ddc_bus->rec.mask_clk_reg, |
284 | radeon_connector->ddc_bus->rec.mask_data_reg, | 284 | radeon_connector->ddc_bus->rec.mask_data_reg, |
@@ -288,6 +288,15 @@ static void radeon_print_display_setup(struct drm_device *dev) | |||
288 | radeon_connector->ddc_bus->rec.en_data_reg, | 288 | radeon_connector->ddc_bus->rec.en_data_reg, |
289 | radeon_connector->ddc_bus->rec.y_clk_reg, | 289 | radeon_connector->ddc_bus->rec.y_clk_reg, |
290 | radeon_connector->ddc_bus->rec.y_data_reg); | 290 | radeon_connector->ddc_bus->rec.y_data_reg); |
291 | } else { | ||
292 | if (connector->connector_type == DRM_MODE_CONNECTOR_VGA || | ||
293 | connector->connector_type == DRM_MODE_CONNECTOR_DVII || | ||
294 | connector->connector_type == DRM_MODE_CONNECTOR_DVID || | ||
295 | connector->connector_type == DRM_MODE_CONNECTOR_DVIA || | ||
296 | connector->connector_type == DRM_MODE_CONNECTOR_HDMIA || | ||
297 | connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) | ||
298 | DRM_INFO(" DDC: no ddc bus - possible BIOS bug - please report to xorg-driver-ati@lists.x.org\n"); | ||
299 | } | ||
291 | DRM_INFO(" Encoders:\n"); | 300 | DRM_INFO(" Encoders:\n"); |
292 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | 301 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { |
293 | radeon_encoder = to_radeon_encoder(encoder); | 302 | radeon_encoder = to_radeon_encoder(encoder); |
@@ -357,7 +366,8 @@ int radeon_ddc_get_modes(struct radeon_connector *radeon_connector) | |||
357 | if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) || | 366 | if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) || |
358 | (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)) { | 367 | (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)) { |
359 | struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; | 368 | struct radeon_connector_atom_dig *dig = radeon_connector->con_priv; |
360 | if (dig->dp_i2c_bus) | 369 | if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT || |
370 | dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) && dig->dp_i2c_bus) | ||
361 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &dig->dp_i2c_bus->adapter); | 371 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &dig->dp_i2c_bus->adapter); |
362 | } | 372 | } |
363 | if (!radeon_connector->ddc_bus) | 373 | if (!radeon_connector->ddc_bus) |
@@ -410,11 +420,12 @@ void radeon_compute_pll(struct radeon_pll *pll, | |||
410 | uint32_t *fb_div_p, | 420 | uint32_t *fb_div_p, |
411 | uint32_t *frac_fb_div_p, | 421 | uint32_t *frac_fb_div_p, |
412 | uint32_t *ref_div_p, | 422 | uint32_t *ref_div_p, |
413 | uint32_t *post_div_p, | 423 | uint32_t *post_div_p) |
414 | int flags) | ||
415 | { | 424 | { |
416 | uint32_t min_ref_div = pll->min_ref_div; | 425 | uint32_t min_ref_div = pll->min_ref_div; |
417 | uint32_t max_ref_div = pll->max_ref_div; | 426 | uint32_t max_ref_div = pll->max_ref_div; |
427 | uint32_t min_post_div = pll->min_post_div; | ||
428 | uint32_t max_post_div = pll->max_post_div; | ||
418 | uint32_t min_fractional_feed_div = 0; | 429 | uint32_t min_fractional_feed_div = 0; |
419 | uint32_t max_fractional_feed_div = 0; | 430 | uint32_t max_fractional_feed_div = 0; |
420 | uint32_t best_vco = pll->best_vco; | 431 | uint32_t best_vco = pll->best_vco; |
@@ -430,7 +441,7 @@ void radeon_compute_pll(struct radeon_pll *pll, | |||
430 | DRM_DEBUG("PLL freq %llu %u %u\n", freq, pll->min_ref_div, pll->max_ref_div); | 441 | DRM_DEBUG("PLL freq %llu %u %u\n", freq, pll->min_ref_div, pll->max_ref_div); |
431 | freq = freq * 1000; | 442 | freq = freq * 1000; |
432 | 443 | ||
433 | if (flags & RADEON_PLL_USE_REF_DIV) | 444 | if (pll->flags & RADEON_PLL_USE_REF_DIV) |
434 | min_ref_div = max_ref_div = pll->reference_div; | 445 | min_ref_div = max_ref_div = pll->reference_div; |
435 | else { | 446 | else { |
436 | while (min_ref_div < max_ref_div-1) { | 447 | while (min_ref_div < max_ref_div-1) { |
@@ -445,19 +456,22 @@ void radeon_compute_pll(struct radeon_pll *pll, | |||
445 | } | 456 | } |
446 | } | 457 | } |
447 | 458 | ||
448 | if (flags & RADEON_PLL_USE_FRAC_FB_DIV) { | 459 | if (pll->flags & RADEON_PLL_USE_POST_DIV) |
460 | min_post_div = max_post_div = pll->post_div; | ||
461 | |||
462 | if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV) { | ||
449 | min_fractional_feed_div = pll->min_frac_feedback_div; | 463 | min_fractional_feed_div = pll->min_frac_feedback_div; |
450 | max_fractional_feed_div = pll->max_frac_feedback_div; | 464 | max_fractional_feed_div = pll->max_frac_feedback_div; |
451 | } | 465 | } |
452 | 466 | ||
453 | for (post_div = pll->min_post_div; post_div <= pll->max_post_div; ++post_div) { | 467 | for (post_div = min_post_div; post_div <= max_post_div; ++post_div) { |
454 | uint32_t ref_div; | 468 | uint32_t ref_div; |
455 | 469 | ||
456 | if ((flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1)) | 470 | if ((pll->flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1)) |
457 | continue; | 471 | continue; |
458 | 472 | ||
459 | /* legacy radeons only have a few post_divs */ | 473 | /* legacy radeons only have a few post_divs */ |
460 | if (flags & RADEON_PLL_LEGACY) { | 474 | if (pll->flags & RADEON_PLL_LEGACY) { |
461 | if ((post_div == 5) || | 475 | if ((post_div == 5) || |
462 | (post_div == 7) || | 476 | (post_div == 7) || |
463 | (post_div == 9) || | 477 | (post_div == 9) || |
@@ -504,7 +518,7 @@ void radeon_compute_pll(struct radeon_pll *pll, | |||
504 | tmp += (uint64_t)pll->reference_freq * 1000 * frac_feedback_div; | 518 | tmp += (uint64_t)pll->reference_freq * 1000 * frac_feedback_div; |
505 | current_freq = radeon_div(tmp, ref_div * post_div); | 519 | current_freq = radeon_div(tmp, ref_div * post_div); |
506 | 520 | ||
507 | if (flags & RADEON_PLL_PREFER_CLOSEST_LOWER) { | 521 | if (pll->flags & RADEON_PLL_PREFER_CLOSEST_LOWER) { |
508 | error = freq - current_freq; | 522 | error = freq - current_freq; |
509 | error = error < 0 ? 0xffffffff : error; | 523 | error = error < 0 ? 0xffffffff : error; |
510 | } else | 524 | } else |
@@ -531,12 +545,12 @@ void radeon_compute_pll(struct radeon_pll *pll, | |||
531 | best_freq = current_freq; | 545 | best_freq = current_freq; |
532 | best_error = error; | 546 | best_error = error; |
533 | best_vco_diff = vco_diff; | 547 | best_vco_diff = vco_diff; |
534 | } else if (((flags & RADEON_PLL_PREFER_LOW_REF_DIV) && (ref_div < best_ref_div)) || | 548 | } else if (((pll->flags & RADEON_PLL_PREFER_LOW_REF_DIV) && (ref_div < best_ref_div)) || |
535 | ((flags & RADEON_PLL_PREFER_HIGH_REF_DIV) && (ref_div > best_ref_div)) || | 549 | ((pll->flags & RADEON_PLL_PREFER_HIGH_REF_DIV) && (ref_div > best_ref_div)) || |
536 | ((flags & RADEON_PLL_PREFER_LOW_FB_DIV) && (feedback_div < best_feedback_div)) || | 550 | ((pll->flags & RADEON_PLL_PREFER_LOW_FB_DIV) && (feedback_div < best_feedback_div)) || |
537 | ((flags & RADEON_PLL_PREFER_HIGH_FB_DIV) && (feedback_div > best_feedback_div)) || | 551 | ((pll->flags & RADEON_PLL_PREFER_HIGH_FB_DIV) && (feedback_div > best_feedback_div)) || |
538 | ((flags & RADEON_PLL_PREFER_LOW_POST_DIV) && (post_div < best_post_div)) || | 552 | ((pll->flags & RADEON_PLL_PREFER_LOW_POST_DIV) && (post_div < best_post_div)) || |
539 | ((flags & RADEON_PLL_PREFER_HIGH_POST_DIV) && (post_div > best_post_div))) { | 553 | ((pll->flags & RADEON_PLL_PREFER_HIGH_POST_DIV) && (post_div > best_post_div))) { |
540 | best_post_div = post_div; | 554 | best_post_div = post_div; |
541 | best_ref_div = ref_div; | 555 | best_ref_div = ref_div; |
542 | best_feedback_div = feedback_div; | 556 | best_feedback_div = feedback_div; |
@@ -572,8 +586,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, | |||
572 | uint32_t *fb_div_p, | 586 | uint32_t *fb_div_p, |
573 | uint32_t *frac_fb_div_p, | 587 | uint32_t *frac_fb_div_p, |
574 | uint32_t *ref_div_p, | 588 | uint32_t *ref_div_p, |
575 | uint32_t *post_div_p, | 589 | uint32_t *post_div_p) |
576 | int flags) | ||
577 | { | 590 | { |
578 | fixed20_12 m, n, frac_n, p, f_vco, f_pclk, best_freq; | 591 | fixed20_12 m, n, frac_n, p, f_vco, f_pclk, best_freq; |
579 | fixed20_12 pll_out_max, pll_out_min; | 592 | fixed20_12 pll_out_max, pll_out_min; |
@@ -667,7 +680,6 @@ static void radeon_user_framebuffer_destroy(struct drm_framebuffer *fb) | |||
667 | radeonfb_remove(dev, fb); | 680 | radeonfb_remove(dev, fb); |
668 | 681 | ||
669 | if (radeon_fb->obj) { | 682 | if (radeon_fb->obj) { |
670 | radeon_gem_object_unpin(radeon_fb->obj); | ||
671 | mutex_lock(&dev->struct_mutex); | 683 | mutex_lock(&dev->struct_mutex); |
672 | drm_gem_object_unreference(radeon_fb->obj); | 684 | drm_gem_object_unreference(radeon_fb->obj); |
673 | mutex_unlock(&dev->struct_mutex); | 685 | mutex_unlock(&dev->struct_mutex); |
@@ -715,7 +727,11 @@ radeon_user_framebuffer_create(struct drm_device *dev, | |||
715 | struct drm_gem_object *obj; | 727 | struct drm_gem_object *obj; |
716 | 728 | ||
717 | obj = drm_gem_object_lookup(dev, file_priv, mode_cmd->handle); | 729 | obj = drm_gem_object_lookup(dev, file_priv, mode_cmd->handle); |
718 | 730 | if (obj == NULL) { | |
731 | dev_err(&dev->pdev->dev, "No GEM object associated to handle 0x%08X, " | ||
732 | "can't create framebuffer\n", mode_cmd->handle); | ||
733 | return NULL; | ||
734 | } | ||
719 | return radeon_framebuffer_create(dev, mode_cmd, obj); | 735 | return radeon_framebuffer_create(dev, mode_cmd, obj); |
720 | } | 736 | } |
721 | 737 | ||