diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_device.c')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_device.c | 74 |
1 files changed, 42 insertions, 32 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index f97563db4e59..7693f7c67bd3 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -48,6 +48,8 @@ static void radeon_surface_init(struct radeon_device *rdev) | |||
48 | i * (RADEON_SURFACE1_INFO - RADEON_SURFACE0_INFO), | 48 | i * (RADEON_SURFACE1_INFO - RADEON_SURFACE0_INFO), |
49 | 0); | 49 | 0); |
50 | } | 50 | } |
51 | /* enable surfaces */ | ||
52 | WREG32(RADEON_SURFACE_CNTL, 0); | ||
51 | } | 53 | } |
52 | } | 54 | } |
53 | 55 | ||
@@ -119,7 +121,7 @@ int radeon_mc_setup(struct radeon_device *rdev) | |||
119 | if (rdev->mc.vram_location != 0xFFFFFFFFUL) { | 121 | if (rdev->mc.vram_location != 0xFFFFFFFFUL) { |
120 | /* vram location was already setup try to put gtt after | 122 | /* vram location was already setup try to put gtt after |
121 | * if it fits */ | 123 | * if it fits */ |
122 | tmp = rdev->mc.vram_location + rdev->mc.vram_size; | 124 | tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size; |
123 | tmp = (tmp + rdev->mc.gtt_size - 1) & ~(rdev->mc.gtt_size - 1); | 125 | tmp = (tmp + rdev->mc.gtt_size - 1) & ~(rdev->mc.gtt_size - 1); |
124 | if ((0xFFFFFFFFUL - tmp) >= rdev->mc.gtt_size) { | 126 | if ((0xFFFFFFFFUL - tmp) >= rdev->mc.gtt_size) { |
125 | rdev->mc.gtt_location = tmp; | 127 | rdev->mc.gtt_location = tmp; |
@@ -134,13 +136,13 @@ int radeon_mc_setup(struct radeon_device *rdev) | |||
134 | } else if (rdev->mc.gtt_location != 0xFFFFFFFFUL) { | 136 | } else if (rdev->mc.gtt_location != 0xFFFFFFFFUL) { |
135 | /* gtt location was already setup try to put vram before | 137 | /* gtt location was already setup try to put vram before |
136 | * if it fits */ | 138 | * if it fits */ |
137 | if (rdev->mc.vram_size < rdev->mc.gtt_location) { | 139 | if (rdev->mc.mc_vram_size < rdev->mc.gtt_location) { |
138 | rdev->mc.vram_location = 0; | 140 | rdev->mc.vram_location = 0; |
139 | } else { | 141 | } else { |
140 | tmp = rdev->mc.gtt_location + rdev->mc.gtt_size; | 142 | tmp = rdev->mc.gtt_location + rdev->mc.gtt_size; |
141 | tmp += (rdev->mc.vram_size - 1); | 143 | tmp += (rdev->mc.mc_vram_size - 1); |
142 | tmp &= ~(rdev->mc.vram_size - 1); | 144 | tmp &= ~(rdev->mc.mc_vram_size - 1); |
143 | if ((0xFFFFFFFFUL - tmp) >= rdev->mc.vram_size) { | 145 | if ((0xFFFFFFFFUL - tmp) >= rdev->mc.mc_vram_size) { |
144 | rdev->mc.vram_location = tmp; | 146 | rdev->mc.vram_location = tmp; |
145 | } else { | 147 | } else { |
146 | printk(KERN_ERR "[drm] vram too big to fit " | 148 | printk(KERN_ERR "[drm] vram too big to fit " |
@@ -150,12 +152,16 @@ int radeon_mc_setup(struct radeon_device *rdev) | |||
150 | } | 152 | } |
151 | } else { | 153 | } else { |
152 | rdev->mc.vram_location = 0; | 154 | rdev->mc.vram_location = 0; |
153 | rdev->mc.gtt_location = rdev->mc.vram_size; | 155 | tmp = rdev->mc.mc_vram_size; |
156 | tmp = (tmp + rdev->mc.gtt_size - 1) & ~(rdev->mc.gtt_size - 1); | ||
157 | rdev->mc.gtt_location = tmp; | ||
154 | } | 158 | } |
155 | DRM_INFO("radeon: VRAM %uM\n", rdev->mc.vram_size >> 20); | 159 | DRM_INFO("radeon: VRAM %uM\n", rdev->mc.real_vram_size >> 20); |
156 | DRM_INFO("radeon: VRAM from 0x%08X to 0x%08X\n", | 160 | DRM_INFO("radeon: VRAM from 0x%08X to 0x%08X\n", |
157 | rdev->mc.vram_location, | 161 | rdev->mc.vram_location, |
158 | rdev->mc.vram_location + rdev->mc.vram_size - 1); | 162 | rdev->mc.vram_location + rdev->mc.mc_vram_size - 1); |
163 | if (rdev->mc.real_vram_size != rdev->mc.mc_vram_size) | ||
164 | DRM_INFO("radeon: VRAM less than aperture workaround enabled\n"); | ||
159 | DRM_INFO("radeon: GTT %uM\n", rdev->mc.gtt_size >> 20); | 165 | DRM_INFO("radeon: GTT %uM\n", rdev->mc.gtt_size >> 20); |
160 | DRM_INFO("radeon: GTT from 0x%08X to 0x%08X\n", | 166 | DRM_INFO("radeon: GTT from 0x%08X to 0x%08X\n", |
161 | rdev->mc.gtt_location, | 167 | rdev->mc.gtt_location, |
@@ -219,25 +225,18 @@ void radeon_invalid_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) | |||
219 | 225 | ||
220 | void radeon_register_accessor_init(struct radeon_device *rdev) | 226 | void radeon_register_accessor_init(struct radeon_device *rdev) |
221 | { | 227 | { |
222 | rdev->mm_rreg = &r100_mm_rreg; | ||
223 | rdev->mm_wreg = &r100_mm_wreg; | ||
224 | rdev->mc_rreg = &radeon_invalid_rreg; | 228 | rdev->mc_rreg = &radeon_invalid_rreg; |
225 | rdev->mc_wreg = &radeon_invalid_wreg; | 229 | rdev->mc_wreg = &radeon_invalid_wreg; |
226 | rdev->pll_rreg = &radeon_invalid_rreg; | 230 | rdev->pll_rreg = &radeon_invalid_rreg; |
227 | rdev->pll_wreg = &radeon_invalid_wreg; | 231 | rdev->pll_wreg = &radeon_invalid_wreg; |
228 | rdev->pcie_rreg = &radeon_invalid_rreg; | ||
229 | rdev->pcie_wreg = &radeon_invalid_wreg; | ||
230 | rdev->pciep_rreg = &radeon_invalid_rreg; | 232 | rdev->pciep_rreg = &radeon_invalid_rreg; |
231 | rdev->pciep_wreg = &radeon_invalid_wreg; | 233 | rdev->pciep_wreg = &radeon_invalid_wreg; |
232 | 234 | ||
233 | /* Don't change order as we are overridding accessor. */ | 235 | /* Don't change order as we are overridding accessor. */ |
234 | if (rdev->family < CHIP_RV515) { | 236 | if (rdev->family < CHIP_RV515) { |
235 | rdev->pcie_rreg = &rv370_pcie_rreg; | 237 | rdev->pcie_reg_mask = 0xff; |
236 | rdev->pcie_wreg = &rv370_pcie_wreg; | 238 | } else { |
237 | } | 239 | rdev->pcie_reg_mask = 0x7ff; |
238 | if (rdev->family >= CHIP_RV515) { | ||
239 | rdev->pcie_rreg = &rv515_pcie_rreg; | ||
240 | rdev->pcie_wreg = &rv515_pcie_wreg; | ||
241 | } | 240 | } |
242 | /* FIXME: not sure here */ | 241 | /* FIXME: not sure here */ |
243 | if (rdev->family <= CHIP_R580) { | 242 | if (rdev->family <= CHIP_R580) { |
@@ -450,6 +449,7 @@ int radeon_device_init(struct radeon_device *rdev, | |||
450 | uint32_t flags) | 449 | uint32_t flags) |
451 | { | 450 | { |
452 | int r, ret; | 451 | int r, ret; |
452 | int dma_bits; | ||
453 | 453 | ||
454 | DRM_INFO("radeon: Initializing kernel modesetting.\n"); | 454 | DRM_INFO("radeon: Initializing kernel modesetting.\n"); |
455 | rdev->shutdown = false; | 455 | rdev->shutdown = false; |
@@ -492,8 +492,20 @@ int radeon_device_init(struct radeon_device *rdev, | |||
492 | return r; | 492 | return r; |
493 | } | 493 | } |
494 | 494 | ||
495 | /* Report DMA addressing limitation */ | 495 | /* set DMA mask + need_dma32 flags. |
496 | r = pci_set_dma_mask(rdev->pdev, DMA_BIT_MASK(32)); | 496 | * PCIE - can handle 40-bits. |
497 | * IGP - can handle 40-bits (in theory) | ||
498 | * AGP - generally dma32 is safest | ||
499 | * PCI - only dma32 | ||
500 | */ | ||
501 | rdev->need_dma32 = false; | ||
502 | if (rdev->flags & RADEON_IS_AGP) | ||
503 | rdev->need_dma32 = true; | ||
504 | if (rdev->flags & RADEON_IS_PCI) | ||
505 | rdev->need_dma32 = true; | ||
506 | |||
507 | dma_bits = rdev->need_dma32 ? 32 : 40; | ||
508 | r = pci_set_dma_mask(rdev->pdev, DMA_BIT_MASK(dma_bits)); | ||
497 | if (r) { | 509 | if (r) { |
498 | printk(KERN_WARNING "radeon: No suitable DMA available.\n"); | 510 | printk(KERN_WARNING "radeon: No suitable DMA available.\n"); |
499 | } | 511 | } |
@@ -546,27 +558,22 @@ int radeon_device_init(struct radeon_device *rdev, | |||
546 | radeon_combios_asic_init(rdev->ddev); | 558 | radeon_combios_asic_init(rdev->ddev); |
547 | } | 559 | } |
548 | } | 560 | } |
561 | /* Initialize clocks */ | ||
562 | r = radeon_clocks_init(rdev); | ||
563 | if (r) { | ||
564 | return r; | ||
565 | } | ||
549 | /* Get vram informations */ | 566 | /* Get vram informations */ |
550 | radeon_vram_info(rdev); | 567 | radeon_vram_info(rdev); |
551 | /* Device is severly broken if aper size > vram size. | 568 | |
552 | * for RN50/M6/M7 - Novell bug 204882 ? | ||
553 | */ | ||
554 | if (rdev->mc.vram_size < rdev->mc.aper_size) { | ||
555 | rdev->mc.aper_size = rdev->mc.vram_size; | ||
556 | } | ||
557 | /* Add an MTRR for the VRAM */ | 569 | /* Add an MTRR for the VRAM */ |
558 | rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size, | 570 | rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size, |
559 | MTRR_TYPE_WRCOMB, 1); | 571 | MTRR_TYPE_WRCOMB, 1); |
560 | DRM_INFO("Detected VRAM RAM=%uM, BAR=%uM\n", | 572 | DRM_INFO("Detected VRAM RAM=%uM, BAR=%uM\n", |
561 | rdev->mc.vram_size >> 20, | 573 | rdev->mc.real_vram_size >> 20, |
562 | (unsigned)rdev->mc.aper_size >> 20); | 574 | (unsigned)rdev->mc.aper_size >> 20); |
563 | DRM_INFO("RAM width %dbits %cDR\n", | 575 | DRM_INFO("RAM width %dbits %cDR\n", |
564 | rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S'); | 576 | rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S'); |
565 | /* Initialize clocks */ | ||
566 | r = radeon_clocks_init(rdev); | ||
567 | if (r) { | ||
568 | return r; | ||
569 | } | ||
570 | /* Initialize memory controller (also test AGP) */ | 577 | /* Initialize memory controller (also test AGP) */ |
571 | r = radeon_mc_init(rdev); | 578 | r = radeon_mc_init(rdev); |
572 | if (r) { | 579 | if (r) { |
@@ -626,6 +633,9 @@ int radeon_device_init(struct radeon_device *rdev, | |||
626 | if (!ret) { | 633 | if (!ret) { |
627 | DRM_INFO("radeon: kernel modesetting successfully initialized.\n"); | 634 | DRM_INFO("radeon: kernel modesetting successfully initialized.\n"); |
628 | } | 635 | } |
636 | if (radeon_testing) { | ||
637 | radeon_test_moves(rdev); | ||
638 | } | ||
629 | if (radeon_benchmarking) { | 639 | if (radeon_benchmarking) { |
630 | radeon_benchmark(rdev); | 640 | radeon_benchmark(rdev); |
631 | } | 641 | } |