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Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_atombios.c')
-rw-r--r--drivers/gpu/drm/radeon/radeon_atombios.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 52777902bbcc..4dc9c518c2fe 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -1163,16 +1163,6 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
1163 p1pll->pll_out_min = 64800; 1163 p1pll->pll_out_min = 64800;
1164 else 1164 else
1165 p1pll->pll_out_min = 20000; 1165 p1pll->pll_out_min = 20000;
1166 } else if (p1pll->pll_out_min > 64800) {
1167 /* Limiting the pll output range is a good thing generally as
1168 * it limits the number of possible pll combinations for a given
1169 * frequency presumably to the ones that work best on each card.
1170 * However, certain duallink DVI monitors seem to like
1171 * pll combinations that would be limited by this at least on
1172 * pre-DCE 3.0 r6xx hardware. This might need to be adjusted per
1173 * family.
1174 */
1175 p1pll->pll_out_min = 64800;
1176 } 1166 }
1177 1167
1178 p1pll->pll_in_min = 1168 p1pll->pll_in_min =