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path: root/drivers/gpu/drm/radeon/radeon.h
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Diffstat (limited to 'drivers/gpu/drm/radeon/radeon.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon.h26
1 files changed, 25 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 15b9e03bb589..0b8dad604ad8 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -399,6 +399,23 @@ struct radeon_cp {
399 bool ready; 399 bool ready;
400}; 400};
401 401
402/*
403 * R6xx+ IH ring
404 */
405struct r600_ih {
406 struct radeon_object *ring_obj;
407 volatile uint32_t *ring;
408 unsigned rptr;
409 unsigned wptr;
410 unsigned wptr_old;
411 unsigned ring_size;
412 uint64_t gpu_addr;
413 uint32_t align_mask;
414 uint32_t ptr_mask;
415 spinlock_t lock;
416 bool enabled;
417};
418
402struct r600_blit { 419struct r600_blit {
403 struct radeon_object *shader_obj; 420 struct radeon_object *shader_obj;
404 u64 shader_gpu_addr; 421 u64 shader_gpu_addr;
@@ -792,8 +809,10 @@ struct radeon_device {
792 struct radeon_surface_reg surface_regs[RADEON_GEM_MAX_SURFACES]; 809 struct radeon_surface_reg surface_regs[RADEON_GEM_MAX_SURFACES];
793 const struct firmware *me_fw; /* all family ME firmware */ 810 const struct firmware *me_fw; /* all family ME firmware */
794 const struct firmware *pfp_fw; /* r6/700 PFP firmware */ 811 const struct firmware *pfp_fw; /* r6/700 PFP firmware */
812 const struct firmware *rlc_fw; /* r6/700 RLC firmware */
795 struct r600_blit r600_blit; 813 struct r600_blit r600_blit;
796 int msi_enabled; /* msi enabled */ 814 int msi_enabled; /* msi enabled */
815 struct r600_ih ih; /* r6/700 interrupt ring */
797}; 816};
798 817
799int radeon_device_init(struct radeon_device *rdev, 818int radeon_device_init(struct radeon_device *rdev,
@@ -1108,7 +1127,12 @@ extern void r600_wb_disable(struct radeon_device *rdev);
1108extern void r600_scratch_init(struct radeon_device *rdev); 1127extern void r600_scratch_init(struct radeon_device *rdev);
1109extern int r600_blit_init(struct radeon_device *rdev); 1128extern int r600_blit_init(struct radeon_device *rdev);
1110extern void r600_blit_fini(struct radeon_device *rdev); 1129extern void r600_blit_fini(struct radeon_device *rdev);
1111extern int r600_cp_init_microcode(struct radeon_device *rdev); 1130extern int r600_init_microcode(struct radeon_device *rdev);
1112extern int r600_gpu_reset(struct radeon_device *rdev); 1131extern int r600_gpu_reset(struct radeon_device *rdev);
1132/* r600 irq */
1133extern int r600_irq_init(struct radeon_device *rdev);
1134extern void r600_irq_fini(struct radeon_device *rdev);
1135extern void r600_ih_ring_init(struct radeon_device *rdev, unsigned ring_size);
1136extern int r600_irq_set(struct radeon_device *rdev);
1113 1137
1114#endif 1138#endif