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-rw-r--r--drivers/gpu/drm/radeon/radeon.h28
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 29ae3839c212..d7da6e742de8 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -89,6 +89,7 @@ extern int radeon_testing;
89extern int radeon_connector_table; 89extern int radeon_connector_table;
90extern int radeon_tv; 90extern int radeon_tv;
91extern int radeon_new_pll; 91extern int radeon_new_pll;
92extern int radeon_dynpm;
92extern int radeon_audio; 93extern int radeon_audio;
93 94
94/* 95/*
@@ -148,6 +149,7 @@ struct radeon_clock {
148 * Power management 149 * Power management
149 */ 150 */
150int radeon_pm_init(struct radeon_device *rdev); 151int radeon_pm_init(struct radeon_device *rdev);
152void radeon_pm_compute_clocks(struct radeon_device *rdev);
151 153
152/* 154/*
153 * Fences. 155 * Fences.
@@ -569,7 +571,33 @@ struct radeon_wb {
569 * Equation between gpu/memory clock and available bandwidth is hw dependent 571 * Equation between gpu/memory clock and available bandwidth is hw dependent
570 * (type of memory, bus size, efficiency, ...) 572 * (type of memory, bus size, efficiency, ...)
571 */ 573 */
574enum radeon_pm_state {
575 PM_STATE_DISABLED,
576 PM_STATE_MINIMUM,
577 PM_STATE_PAUSED,
578 PM_STATE_ACTIVE
579};
580enum radeon_pm_action {
581 PM_ACTION_NONE,
582 PM_ACTION_MINIMUM,
583 PM_ACTION_DOWNCLOCK,
584 PM_ACTION_UPCLOCK
585};
572struct radeon_pm { 586struct radeon_pm {
587 struct mutex mutex;
588 struct work_struct reclock_work;
589 struct delayed_work idle_work;
590 enum radeon_pm_state state;
591 enum radeon_pm_action planned_action;
592 unsigned long action_timeout;
593 bool downclocked;
594 bool vblank_callback;
595 int active_crtcs;
596 int req_vblank;
597 uint32_t min_gpu_engine_clock;
598 uint32_t min_gpu_memory_clock;
599 uint32_t min_mode_engine_clock;
600 uint32_t min_mode_memory_clock;
573 fixed20_12 max_bandwidth; 601 fixed20_12 max_bandwidth;
574 fixed20_12 igp_sideport_mclk; 602 fixed20_12 igp_sideport_mclk;
575 fixed20_12 igp_system_mclk; 603 fixed20_12 igp_system_mclk;