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path: root/drivers/gpu/drm/radeon/r600d.h
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Diffstat (limited to 'drivers/gpu/drm/radeon/r600d.h')
-rw-r--r--drivers/gpu/drm/radeon/r600d.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index 0245ae6c204e..bfe1b5d92afe 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -79,6 +79,11 @@
79#define CB_COLOR0_SIZE 0x28060 79#define CB_COLOR0_SIZE 0x28060
80#define CB_COLOR0_VIEW 0x28080 80#define CB_COLOR0_VIEW 0x28080
81#define CB_COLOR0_INFO 0x280a0 81#define CB_COLOR0_INFO 0x280a0
82# define CB_FORMAT(x) ((x) << 2)
83# define CB_ARRAY_MODE(x) ((x) << 8)
84# define CB_SOURCE_FORMAT(x) ((x) << 27)
85# define CB_SF_EXPORT_FULL 0
86# define CB_SF_EXPORT_NORM 1
82#define CB_COLOR0_TILE 0x280c0 87#define CB_COLOR0_TILE 0x280c0
83#define CB_COLOR0_FRAG 0x280e0 88#define CB_COLOR0_FRAG 0x280e0
84#define CB_COLOR0_MASK 0x28100 89#define CB_COLOR0_MASK 0x28100
@@ -417,6 +422,17 @@
417#define SQ_PGM_START_VS 0x28858 422#define SQ_PGM_START_VS 0x28858
418#define SQ_PGM_RESOURCES_VS 0x28868 423#define SQ_PGM_RESOURCES_VS 0x28868
419#define SQ_PGM_CF_OFFSET_VS 0x288d0 424#define SQ_PGM_CF_OFFSET_VS 0x288d0
425
426#define SQ_VTX_CONSTANT_WORD0_0 0x30000
427#define SQ_VTX_CONSTANT_WORD1_0 0x30004
428#define SQ_VTX_CONSTANT_WORD2_0 0x30008
429# define SQ_VTXC_BASE_ADDR_HI(x) ((x) << 0)
430# define SQ_VTXC_STRIDE(x) ((x) << 8)
431# define SQ_VTXC_ENDIAN_SWAP(x) ((x) << 30)
432# define SQ_ENDIAN_NONE 0
433# define SQ_ENDIAN_8IN16 1
434# define SQ_ENDIAN_8IN32 2
435#define SQ_VTX_CONSTANT_WORD3_0 0x3000c
420#define SQ_VTX_CONSTANT_WORD6_0 0x38018 436#define SQ_VTX_CONSTANT_WORD6_0 0x38018
421#define S__SQ_VTX_CONSTANT_TYPE(x) (((x) & 3) << 30) 437#define S__SQ_VTX_CONSTANT_TYPE(x) (((x) & 3) << 30)
422#define G__SQ_VTX_CONSTANT_TYPE(x) (((x) >> 30) & 3) 438#define G__SQ_VTX_CONSTANT_TYPE(x) (((x) >> 30) & 3)
@@ -1352,6 +1368,12 @@
1352#define S_038010_DST_SEL_W(x) (((x) & 0x7) << 25) 1368#define S_038010_DST_SEL_W(x) (((x) & 0x7) << 25)
1353#define G_038010_DST_SEL_W(x) (((x) >> 25) & 0x7) 1369#define G_038010_DST_SEL_W(x) (((x) >> 25) & 0x7)
1354#define C_038010_DST_SEL_W 0xF1FFFFFF 1370#define C_038010_DST_SEL_W 0xF1FFFFFF
1371# define SQ_SEL_X 0
1372# define SQ_SEL_Y 1
1373# define SQ_SEL_Z 2
1374# define SQ_SEL_W 3
1375# define SQ_SEL_0 4
1376# define SQ_SEL_1 5
1355#define S_038010_BASE_LEVEL(x) (((x) & 0xF) << 28) 1377#define S_038010_BASE_LEVEL(x) (((x) & 0xF) << 28)
1356#define G_038010_BASE_LEVEL(x) (((x) >> 28) & 0xF) 1378#define G_038010_BASE_LEVEL(x) (((x) >> 28) & 0xF)
1357#define C_038010_BASE_LEVEL 0x0FFFFFFF 1379#define C_038010_BASE_LEVEL 0x0FFFFFFF