1 files changed, 6 insertions, 6 deletions

diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index e616eb5f6e7a..ea5c9af722ef 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2769,8 +2769,8 @@ bool r600_semaphore_ring_emit(struct radeon_device *rdev,
         radeon_ring_write(ring, lower_32_bits(addr));
         radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | sel);
 
-        /* PFP_SYNC_ME packet only exists on 7xx+ */
-        if (emit_wait && (rdev->family >= CHIP_RV770)) {
+        /* PFP_SYNC_ME packet only exists on 7xx+, only enable it on eg+ */
+        if (emit_wait && (rdev->family >= CHIP_CEDAR)) {
                 /* Prevent the PFP from running ahead of the semaphore wait */
                 radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
                 radeon_ring_write(ring, 0x0);
@@ -3792,17 +3792,17 @@ static u32 r600_get_ih_wptr(struct radeon_device *rdev)
                 wptr = RREG32(IH_RB_WPTR);
 
         if (wptr & RB_OVERFLOW) {
+                wptr &= ~RB_OVERFLOW;
                 /* When a ring buffer overflow happen start parsing interrupt
                  * from the last not overwritten vector (wptr + 16). Hopefully
                  * this should allow us to catchup.
                  */
-                dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, %d, %d)\n",
-                        wptr, rdev->ih.rptr, (wptr + 16) + rdev->ih.ptr_mask);
+                dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
+                         wptr, rdev->ih.rptr, (wptr + 16) & rdev->ih.ptr_mask);
                 rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask;
                 tmp = RREG32(IH_RB_CNTL);
                 tmp |= IH_WPTR_OVERFLOW_CLEAR;
                 WREG32(IH_RB_CNTL, tmp);
-                wptr &= ~RB_OVERFLOW;
         }
         return (wptr & rdev->ih.ptr_mask);
 }
@@ -4048,6 +4048,7 @@ restart_ih:
                 /* wptr/rptr are in bytes! */
                 rptr += 16;
                 rptr &= rdev->ih.ptr_mask;
+                WREG32(IH_RB_RPTR, rptr);
         }
         if (queue_hotplug)
                 schedule_work(&rdev->hotplug_work);
@@ -4056,7 +4057,6 @@ restart_ih:
         if (queue_thermal && rdev->pm.dpm_enabled)
                 schedule_work(&rdev->pm.dpm.thermal.work);
         rdev->ih.rptr = rptr;
-        WREG32(IH_RB_RPTR, rdev->ih.rptr);
         atomic_set(&rdev->ih.lock, 0);
 
         /* make sure wptr hasn't changed while processing */