diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/r600.c')
-rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 48 |
1 files changed, 34 insertions, 14 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 1b6d0001b20e..a1198d99cdf9 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -1654,6 +1654,12 @@ void r600_ring_init(struct radeon_device *rdev, unsigned ring_size) | |||
1654 | rdev->cp.align_mask = 16 - 1; | 1654 | rdev->cp.align_mask = 16 - 1; |
1655 | } | 1655 | } |
1656 | 1656 | ||
1657 | void r600_cp_fini(struct radeon_device *rdev) | ||
1658 | { | ||
1659 | r600_cp_stop(rdev); | ||
1660 | radeon_ring_fini(rdev); | ||
1661 | } | ||
1662 | |||
1657 | 1663 | ||
1658 | /* | 1664 | /* |
1659 | * GPU scratch registers helpers function. | 1665 | * GPU scratch registers helpers function. |
@@ -1861,6 +1867,12 @@ int r600_startup(struct radeon_device *rdev) | |||
1861 | return r; | 1867 | return r; |
1862 | } | 1868 | } |
1863 | r600_gpu_init(rdev); | 1869 | r600_gpu_init(rdev); |
1870 | r = r600_blit_init(rdev); | ||
1871 | if (r) { | ||
1872 | r600_blit_fini(rdev); | ||
1873 | rdev->asic->copy = NULL; | ||
1874 | dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r); | ||
1875 | } | ||
1864 | /* pin copy shader into vram */ | 1876 | /* pin copy shader into vram */ |
1865 | if (rdev->r600_blit.shader_obj) { | 1877 | if (rdev->r600_blit.shader_obj) { |
1866 | r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false); | 1878 | r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false); |
@@ -2045,19 +2057,15 @@ int r600_init(struct radeon_device *rdev) | |||
2045 | r = r600_pcie_gart_init(rdev); | 2057 | r = r600_pcie_gart_init(rdev); |
2046 | if (r) | 2058 | if (r) |
2047 | return r; | 2059 | return r; |
2048 | r = r600_blit_init(rdev); | ||
2049 | if (r) { | ||
2050 | r600_blit_fini(rdev); | ||
2051 | rdev->asic->copy = NULL; | ||
2052 | dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r); | ||
2053 | } | ||
2054 | 2060 | ||
2055 | rdev->accel_working = true; | 2061 | rdev->accel_working = true; |
2056 | r = r600_startup(rdev); | 2062 | r = r600_startup(rdev); |
2057 | if (r) { | 2063 | if (r) { |
2058 | r600_suspend(rdev); | 2064 | dev_err(rdev->dev, "disabling GPU acceleration\n"); |
2065 | r600_cp_fini(rdev); | ||
2059 | r600_wb_fini(rdev); | 2066 | r600_wb_fini(rdev); |
2060 | radeon_ring_fini(rdev); | 2067 | r600_irq_fini(rdev); |
2068 | radeon_irq_kms_fini(rdev); | ||
2061 | r600_pcie_gart_fini(rdev); | 2069 | r600_pcie_gart_fini(rdev); |
2062 | rdev->accel_working = false; | 2070 | rdev->accel_working = false; |
2063 | } | 2071 | } |
@@ -2083,20 +2091,17 @@ int r600_init(struct radeon_device *rdev) | |||
2083 | 2091 | ||
2084 | void r600_fini(struct radeon_device *rdev) | 2092 | void r600_fini(struct radeon_device *rdev) |
2085 | { | 2093 | { |
2086 | /* Suspend operations */ | ||
2087 | r600_suspend(rdev); | ||
2088 | |||
2089 | r600_audio_fini(rdev); | 2094 | r600_audio_fini(rdev); |
2090 | r600_blit_fini(rdev); | 2095 | r600_blit_fini(rdev); |
2096 | r600_cp_fini(rdev); | ||
2097 | r600_wb_fini(rdev); | ||
2091 | r600_irq_fini(rdev); | 2098 | r600_irq_fini(rdev); |
2092 | radeon_irq_kms_fini(rdev); | 2099 | radeon_irq_kms_fini(rdev); |
2093 | radeon_ring_fini(rdev); | ||
2094 | r600_wb_fini(rdev); | ||
2095 | r600_pcie_gart_fini(rdev); | 2100 | r600_pcie_gart_fini(rdev); |
2101 | radeon_agp_fini(rdev); | ||
2096 | radeon_gem_fini(rdev); | 2102 | radeon_gem_fini(rdev); |
2097 | radeon_fence_driver_fini(rdev); | 2103 | radeon_fence_driver_fini(rdev); |
2098 | radeon_clocks_fini(rdev); | 2104 | radeon_clocks_fini(rdev); |
2099 | radeon_agp_fini(rdev); | ||
2100 | radeon_bo_fini(rdev); | 2105 | radeon_bo_fini(rdev); |
2101 | radeon_atombios_fini(rdev); | 2106 | radeon_atombios_fini(rdev); |
2102 | kfree(rdev->bios); | 2107 | kfree(rdev->bios); |
@@ -2900,3 +2905,18 @@ int r600_debugfs_mc_info_init(struct radeon_device *rdev) | |||
2900 | return 0; | 2905 | return 0; |
2901 | #endif | 2906 | #endif |
2902 | } | 2907 | } |
2908 | |||
2909 | /** | ||
2910 | * r600_ioctl_wait_idle - flush host path cache on wait idle ioctl | ||
2911 | * rdev: radeon device structure | ||
2912 | * bo: buffer object struct which userspace is waiting for idle | ||
2913 | * | ||
2914 | * Some R6XX/R7XX doesn't seems to take into account HDP flush performed | ||
2915 | * through ring buffer, this leads to corruption in rendering, see | ||
2916 | * http://bugzilla.kernel.org/show_bug.cgi?id=15186 to avoid this we | ||
2917 | * directly perform HDP flush by writing register through MMIO. | ||
2918 | */ | ||
2919 | void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo) | ||
2920 | { | ||
2921 | WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1); | ||
2922 | } | ||