aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/radeon/r600.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/radeon/r600.c')
-rw-r--r--drivers/gpu/drm/radeon/r600.c71
1 files changed, 60 insertions, 11 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 6ea947d669e9..9b08c5743c86 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -44,6 +44,9 @@
44#define R700_PFP_UCODE_SIZE 848 44#define R700_PFP_UCODE_SIZE 848
45#define R700_PM4_UCODE_SIZE 1360 45#define R700_PM4_UCODE_SIZE 1360
46#define R700_RLC_UCODE_SIZE 1024 46#define R700_RLC_UCODE_SIZE 1024
47#define EVERGREEN_PFP_UCODE_SIZE 1120
48#define EVERGREEN_PM4_UCODE_SIZE 1376
49#define EVERGREEN_RLC_UCODE_SIZE 768
47 50
48/* Firmware Names */ 51/* Firmware Names */
49MODULE_FIRMWARE("radeon/R600_pfp.bin"); 52MODULE_FIRMWARE("radeon/R600_pfp.bin");
@@ -68,6 +71,18 @@ MODULE_FIRMWARE("radeon/RV710_pfp.bin");
68MODULE_FIRMWARE("radeon/RV710_me.bin"); 71MODULE_FIRMWARE("radeon/RV710_me.bin");
69MODULE_FIRMWARE("radeon/R600_rlc.bin"); 72MODULE_FIRMWARE("radeon/R600_rlc.bin");
70MODULE_FIRMWARE("radeon/R700_rlc.bin"); 73MODULE_FIRMWARE("radeon/R700_rlc.bin");
74MODULE_FIRMWARE("radeon/CEDAR_pfp.bin");
75MODULE_FIRMWARE("radeon/CEDAR_me.bin");
76MODULE_FIRMWARE("radeon/CEDAR_rlc.bin");
77MODULE_FIRMWARE("radeon/REDWOOD_pfp.bin");
78MODULE_FIRMWARE("radeon/REDWOOD_me.bin");
79MODULE_FIRMWARE("radeon/REDWOOD_rlc.bin");
80MODULE_FIRMWARE("radeon/JUNIPER_pfp.bin");
81MODULE_FIRMWARE("radeon/JUNIPER_me.bin");
82MODULE_FIRMWARE("radeon/JUNIPER_rlc.bin");
83MODULE_FIRMWARE("radeon/CYPRESS_pfp.bin");
84MODULE_FIRMWARE("radeon/CYPRESS_me.bin");
85MODULE_FIRMWARE("radeon/CYPRESS_rlc.bin");
71 86
72int r600_debugfs_mc_info_init(struct radeon_device *rdev); 87int r600_debugfs_mc_info_init(struct radeon_device *rdev);
73 88
@@ -75,6 +90,7 @@ int r600_debugfs_mc_info_init(struct radeon_device *rdev);
75int r600_mc_wait_for_idle(struct radeon_device *rdev); 90int r600_mc_wait_for_idle(struct radeon_device *rdev);
76void r600_gpu_init(struct radeon_device *rdev); 91void r600_gpu_init(struct radeon_device *rdev);
77void r600_fini(struct radeon_device *rdev); 92void r600_fini(struct radeon_device *rdev);
93void r600_irq_disable(struct radeon_device *rdev);
78 94
79/* hpd for digital panel detect/disconnect */ 95/* hpd for digital panel detect/disconnect */
80bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd) 96bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd)
@@ -1450,10 +1466,31 @@ int r600_init_microcode(struct radeon_device *rdev)
1450 chip_name = "RV710"; 1466 chip_name = "RV710";
1451 rlc_chip_name = "R700"; 1467 rlc_chip_name = "R700";
1452 break; 1468 break;
1469 case CHIP_CEDAR:
1470 chip_name = "CEDAR";
1471 rlc_chip_name = "CEDAR";
1472 break;
1473 case CHIP_REDWOOD:
1474 chip_name = "REDWOOD";
1475 rlc_chip_name = "REDWOOD";
1476 break;
1477 case CHIP_JUNIPER:
1478 chip_name = "JUNIPER";
1479 rlc_chip_name = "JUNIPER";
1480 break;
1481 case CHIP_CYPRESS:
1482 case CHIP_HEMLOCK:
1483 chip_name = "CYPRESS";
1484 rlc_chip_name = "CYPRESS";
1485 break;
1453 default: BUG(); 1486 default: BUG();
1454 } 1487 }
1455 1488
1456 if (rdev->family >= CHIP_RV770) { 1489 if (rdev->family >= CHIP_CEDAR) {
1490 pfp_req_size = EVERGREEN_PFP_UCODE_SIZE * 4;
1491 me_req_size = EVERGREEN_PM4_UCODE_SIZE * 4;
1492 rlc_req_size = EVERGREEN_RLC_UCODE_SIZE * 4;
1493 } else if (rdev->family >= CHIP_RV770) {
1457 pfp_req_size = R700_PFP_UCODE_SIZE * 4; 1494 pfp_req_size = R700_PFP_UCODE_SIZE * 4;
1458 me_req_size = R700_PM4_UCODE_SIZE * 4; 1495 me_req_size = R700_PM4_UCODE_SIZE * 4;
1459 rlc_req_size = R700_RLC_UCODE_SIZE * 4; 1496 rlc_req_size = R700_RLC_UCODE_SIZE * 4;
@@ -1567,12 +1604,15 @@ int r600_cp_start(struct radeon_device *rdev)
1567 } 1604 }
1568 radeon_ring_write(rdev, PACKET3(PACKET3_ME_INITIALIZE, 5)); 1605 radeon_ring_write(rdev, PACKET3(PACKET3_ME_INITIALIZE, 5));
1569 radeon_ring_write(rdev, 0x1); 1606 radeon_ring_write(rdev, 0x1);
1570 if (rdev->family < CHIP_RV770) { 1607 if (rdev->family >= CHIP_CEDAR) {
1571 radeon_ring_write(rdev, 0x3); 1608 radeon_ring_write(rdev, 0x0);
1572 radeon_ring_write(rdev, rdev->config.r600.max_hw_contexts - 1); 1609 radeon_ring_write(rdev, rdev->config.evergreen.max_hw_contexts - 1);
1573 } else { 1610 } else if (rdev->family >= CHIP_RV770) {
1574 radeon_ring_write(rdev, 0x0); 1611 radeon_ring_write(rdev, 0x0);
1575 radeon_ring_write(rdev, rdev->config.rv770.max_hw_contexts - 1); 1612 radeon_ring_write(rdev, rdev->config.rv770.max_hw_contexts - 1);
1613 } else {
1614 radeon_ring_write(rdev, 0x3);
1615 radeon_ring_write(rdev, rdev->config.r600.max_hw_contexts - 1);
1576 } 1616 }
1577 radeon_ring_write(rdev, PACKET3_ME_INITIALIZE_DEVICE_ID(1)); 1617 radeon_ring_write(rdev, PACKET3_ME_INITIALIZE_DEVICE_ID(1));
1578 radeon_ring_write(rdev, 0); 1618 radeon_ring_write(rdev, 0);
@@ -2273,10 +2313,11 @@ static void r600_ih_ring_fini(struct radeon_device *rdev)
2273 } 2313 }
2274} 2314}
2275 2315
2276static void r600_rlc_stop(struct radeon_device *rdev) 2316void r600_rlc_stop(struct radeon_device *rdev)
2277{ 2317{
2278 2318
2279 if (rdev->family >= CHIP_RV770) { 2319 if ((rdev->family >= CHIP_RV770) &&
2320 (rdev->family <= CHIP_RV740)) {
2280 /* r7xx asics need to soft reset RLC before halting */ 2321 /* r7xx asics need to soft reset RLC before halting */
2281 WREG32(SRBM_SOFT_RESET, SOFT_RESET_RLC); 2322 WREG32(SRBM_SOFT_RESET, SOFT_RESET_RLC);
2282 RREG32(SRBM_SOFT_RESET); 2323 RREG32(SRBM_SOFT_RESET);
@@ -2313,7 +2354,12 @@ static int r600_rlc_init(struct radeon_device *rdev)
2313 WREG32(RLC_UCODE_CNTL, 0); 2354 WREG32(RLC_UCODE_CNTL, 0);
2314 2355
2315 fw_data = (const __be32 *)rdev->rlc_fw->data; 2356 fw_data = (const __be32 *)rdev->rlc_fw->data;
2316 if (rdev->family >= CHIP_RV770) { 2357 if (rdev->family >= CHIP_CEDAR) {
2358 for (i = 0; i < EVERGREEN_RLC_UCODE_SIZE; i++) {
2359 WREG32(RLC_UCODE_ADDR, i);
2360 WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++));
2361 }
2362 } else if (rdev->family >= CHIP_RV770) {
2317 for (i = 0; i < R700_RLC_UCODE_SIZE; i++) { 2363 for (i = 0; i < R700_RLC_UCODE_SIZE; i++) {
2318 WREG32(RLC_UCODE_ADDR, i); 2364 WREG32(RLC_UCODE_ADDR, i);
2319 WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++)); 2365 WREG32(RLC_UCODE_DATA, be32_to_cpup(fw_data++));
@@ -2343,7 +2389,7 @@ static void r600_enable_interrupts(struct radeon_device *rdev)
2343 rdev->ih.enabled = true; 2389 rdev->ih.enabled = true;
2344} 2390}
2345 2391
2346static void r600_disable_interrupts(struct radeon_device *rdev) 2392void r600_disable_interrupts(struct radeon_device *rdev)
2347{ 2393{
2348 u32 ih_rb_cntl = RREG32(IH_RB_CNTL); 2394 u32 ih_rb_cntl = RREG32(IH_RB_CNTL);
2349 u32 ih_cntl = RREG32(IH_CNTL); 2395 u32 ih_cntl = RREG32(IH_CNTL);
@@ -2458,7 +2504,10 @@ int r600_irq_init(struct radeon_device *rdev)
2458 WREG32(IH_CNTL, ih_cntl); 2504 WREG32(IH_CNTL, ih_cntl);
2459 2505
2460 /* force the active interrupt state to all disabled */ 2506 /* force the active interrupt state to all disabled */
2461 r600_disable_interrupt_state(rdev); 2507 if (rdev->family >= CHIP_CEDAR)
2508 evergreen_disable_interrupt_state(rdev);
2509 else
2510 r600_disable_interrupt_state(rdev);
2462 2511
2463 /* enable irqs */ 2512 /* enable irqs */
2464 r600_enable_interrupts(rdev); 2513 r600_enable_interrupts(rdev);
@@ -2468,7 +2517,7 @@ int r600_irq_init(struct radeon_device *rdev)
2468 2517
2469void r600_irq_suspend(struct radeon_device *rdev) 2518void r600_irq_suspend(struct radeon_device *rdev)
2470{ 2519{
2471 r600_disable_interrupts(rdev); 2520 r600_irq_disable(rdev);
2472 r600_rlc_stop(rdev); 2521 r600_rlc_stop(rdev);
2473} 2522}
2474 2523