1 files changed, 2 insertions, 5 deletions

diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index 3c44b8d39318..34330df28483 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -53,7 +53,6 @@ static void r520_gpu_init(struct radeon_device *rdev)
 {
         unsigned pipe_select_current, gb_pipe_select, tmp;
 
-        r100_hdp_reset(rdev);
         rv515_vga_render_disable(rdev);
         /*
          * DST_PIPE_CONFIG              0x170C
@@ -209,7 +208,7 @@ int r520_resume(struct radeon_device *rdev)
         /* Resume clock before doing reset */
         rv515_clock_startup(rdev);
         /* Reset gpu before posting otherwise ATOM will enter infinite loop */
-        if (radeon_gpu_reset(rdev)) {
+        if (radeon_asic_reset(rdev)) {
                 dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
                         RREG32(R_000E40_RBBM_STATUS),
                         RREG32(R_0007C0_CP_STAT));
@@ -246,7 +245,7 @@ int r520_init(struct radeon_device *rdev)
                 return -EINVAL;
         }
         /* Reset gpu before posting otherwise ATOM will enter infinite loop */
-        if (radeon_gpu_reset(rdev)) {
+        if (radeon_asic_reset(rdev)) {
                 dev_warn(rdev->dev,
                         "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
                         RREG32(R_000E40_RBBM_STATUS),
@@ -262,8 +261,6 @@ int r520_init(struct radeon_device *rdev)
         }
         /* Initialize clocks */
         radeon_get_clock_info(rdev->ddev);
-        /* Initialize power management */
-        radeon_pm_init(rdev);
         /* initialize AGP */
         if (rdev->flags & RADEON_IS_AGP) {
                 r = radeon_agp_init(rdev);