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path: root/drivers/gpu/drm/radeon/r300.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/r300.c')
-rw-r--r--drivers/gpu/drm/radeon/r300.c33
1 files changed, 23 insertions, 10 deletions
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 2f43ee8e4048..83378c39d0e3 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -137,14 +137,19 @@ int rv370_pcie_gart_enable(struct radeon_device *rdev)
137 137
138void rv370_pcie_gart_disable(struct radeon_device *rdev) 138void rv370_pcie_gart_disable(struct radeon_device *rdev)
139{ 139{
140 uint32_t tmp; 140 u32 tmp;
141 int r;
141 142
142 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL); 143 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL);
143 tmp |= RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD; 144 tmp |= RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD;
144 WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp & ~RADEON_PCIE_TX_GART_EN); 145 WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp & ~RADEON_PCIE_TX_GART_EN);
145 if (rdev->gart.table.vram.robj) { 146 if (rdev->gart.table.vram.robj) {
146 radeon_object_kunmap(rdev->gart.table.vram.robj); 147 r = radeon_bo_reserve(rdev->gart.table.vram.robj, false);
147 radeon_object_unpin(rdev->gart.table.vram.robj); 148 if (likely(r == 0)) {
149 radeon_bo_kunmap(rdev->gart.table.vram.robj);
150 radeon_bo_unpin(rdev->gart.table.vram.robj);
151 radeon_bo_unreserve(rdev->gart.table.vram.robj);
152 }
148 } 153 }
149} 154}
150 155
@@ -1181,6 +1186,9 @@ static int r300_startup(struct radeon_device *rdev)
1181{ 1186{
1182 int r; 1187 int r;
1183 1188
1189 /* set common regs */
1190 r100_set_common_regs(rdev);
1191 /* program mc */
1184 r300_mc_program(rdev); 1192 r300_mc_program(rdev);
1185 /* Resume clock */ 1193 /* Resume clock */
1186 r300_clock_startup(rdev); 1194 r300_clock_startup(rdev);
@@ -1193,13 +1201,18 @@ static int r300_startup(struct radeon_device *rdev)
1193 if (r) 1201 if (r)
1194 return r; 1202 return r;
1195 } 1203 }
1204
1205 if (rdev->family == CHIP_R300 ||
1206 rdev->family == CHIP_R350 ||
1207 rdev->family == CHIP_RV350)
1208 r100_enable_bm(rdev);
1209
1196 if (rdev->flags & RADEON_IS_PCI) { 1210 if (rdev->flags & RADEON_IS_PCI) {
1197 r = r100_pci_gart_enable(rdev); 1211 r = r100_pci_gart_enable(rdev);
1198 if (r) 1212 if (r)
1199 return r; 1213 return r;
1200 } 1214 }
1201 /* Enable IRQ */ 1215 /* Enable IRQ */
1202 rdev->irq.sw_int = true;
1203 r100_irq_set(rdev); 1216 r100_irq_set(rdev);
1204 /* 1M ring buffer */ 1217 /* 1M ring buffer */
1205 r = r100_cp_init(rdev, 1024 * 1024); 1218 r = r100_cp_init(rdev, 1024 * 1024);
@@ -1237,6 +1250,8 @@ int r300_resume(struct radeon_device *rdev)
1237 radeon_combios_asic_init(rdev->ddev); 1250 radeon_combios_asic_init(rdev->ddev);
1238 /* Resume clock after posting */ 1251 /* Resume clock after posting */
1239 r300_clock_startup(rdev); 1252 r300_clock_startup(rdev);
1253 /* Initialize surface registers */
1254 radeon_surface_init(rdev);
1240 return r300_startup(rdev); 1255 return r300_startup(rdev);
1241} 1256}
1242 1257
@@ -1265,7 +1280,7 @@ void r300_fini(struct radeon_device *rdev)
1265 r100_pci_gart_fini(rdev); 1280 r100_pci_gart_fini(rdev);
1266 radeon_irq_kms_fini(rdev); 1281 radeon_irq_kms_fini(rdev);
1267 radeon_fence_driver_fini(rdev); 1282 radeon_fence_driver_fini(rdev);
1268 radeon_object_fini(rdev); 1283 radeon_bo_fini(rdev);
1269 radeon_atombios_fini(rdev); 1284 radeon_atombios_fini(rdev);
1270 kfree(rdev->bios); 1285 kfree(rdev->bios);
1271 rdev->bios = NULL; 1286 rdev->bios = NULL;
@@ -1303,10 +1318,8 @@ int r300_init(struct radeon_device *rdev)
1303 RREG32(R_0007C0_CP_STAT)); 1318 RREG32(R_0007C0_CP_STAT));
1304 } 1319 }
1305 /* check if cards are posted or not */ 1320 /* check if cards are posted or not */
1306 if (!radeon_card_posted(rdev) && rdev->bios) { 1321 if (radeon_boot_test_post_card(rdev) == false)
1307 DRM_INFO("GPU not posted. posting now...\n"); 1322 return -EINVAL;
1308 radeon_combios_asic_init(rdev->ddev);
1309 }
1310 /* Set asic errata */ 1323 /* Set asic errata */
1311 r300_errata(rdev); 1324 r300_errata(rdev);
1312 /* Initialize clocks */ 1325 /* Initialize clocks */
@@ -1325,7 +1338,7 @@ int r300_init(struct radeon_device *rdev)
1325 if (r) 1338 if (r)
1326 return r; 1339 return r;
1327 /* Memory manager */ 1340 /* Memory manager */
1328 r = radeon_object_init(rdev); 1341 r = radeon_bo_init(rdev);
1329 if (r) 1342 if (r)
1330 return r; 1343 return r;
1331 if (rdev->flags & RADEON_IS_PCIE) { 1344 if (rdev->flags & RADEON_IS_PCIE) {