1 files changed, 13 insertions, 13 deletions

diff --git a/drivers/gpu/drm/radeon/r200.c b/drivers/gpu/drm/radeon/r200.c
index 98143a5c5b73..b3807edb1936 100644
--- a/drivers/gpu/drm/radeon/r200.c
+++ b/drivers/gpu/drm/radeon/r200.c
@@ -162,7 +162,7 @@ int r200_packet0_check(struct radeon_cs_parser *p,
                 if (r) {
                         DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
                                   idx, reg);
-                        r100_cs_dump_packet(p, pkt);
+                        radeon_cs_dump_packet(p, pkt);
                         return r;
                 }
                 break;
@@ -175,11 +175,11 @@ int r200_packet0_check(struct radeon_cs_parser *p,
                         return r;
                 break;
         case RADEON_RB3D_DEPTHOFFSET:
-                r = r100_cs_packet_next_reloc(p, &reloc);
+                r = radeon_cs_packet_next_reloc(p, &reloc, 0);
                 if (r) {
                         DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
                                   idx, reg);
-                        r100_cs_dump_packet(p, pkt);
+                        radeon_cs_dump_packet(p, pkt);
                         return r;
                 }
                 track->zb.robj = reloc->robj;
@@ -188,11 +188,11 @@ int r200_packet0_check(struct radeon_cs_parser *p,
                 ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
                 break;
         case RADEON_RB3D_COLOROFFSET:
-                r = r100_cs_packet_next_reloc(p, &reloc);
+                r = radeon_cs_packet_next_reloc(p, &reloc, 0);
                 if (r) {
                         DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
                                   idx, reg);
-                        r100_cs_dump_packet(p, pkt);
+                        radeon_cs_dump_packet(p, pkt);
                         return r;
                 }
                 track->cb[0].robj = reloc->robj;
@@ -207,11 +207,11 @@ int r200_packet0_check(struct radeon_cs_parser *p,
         case R200_PP_TXOFFSET_4:
         case R200_PP_TXOFFSET_5:
                 i = (reg - R200_PP_TXOFFSET_0) / 24;
-                r = r100_cs_packet_next_reloc(p, &reloc);
+                r = radeon_cs_packet_next_reloc(p, &reloc, 0);
                 if (r) {
                         DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
                                   idx, reg);
-                        r100_cs_dump_packet(p, pkt);
+                        radeon_cs_dump_packet(p, pkt);
                         return r;
                 }
                 if (!(p->cs_flags & RADEON_CS_KEEP_TILING_FLAGS)) {
@@ -260,11 +260,11 @@ int r200_packet0_check(struct radeon_cs_parser *p,
         case R200_PP_CUBIC_OFFSET_F5_5:
                 i = (reg - R200_PP_TXOFFSET_0) / 24;
                 face = (reg - ((i * 24) + R200_PP_TXOFFSET_0)) / 4;
-                r = r100_cs_packet_next_reloc(p, &reloc);
+                r = radeon_cs_packet_next_reloc(p, &reloc, 0);
                 if (r) {
                         DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
                                   idx, reg);
-                        r100_cs_dump_packet(p, pkt);
+                        radeon_cs_dump_packet(p, pkt);
                         return r;
                 }
                 track->textures[i].cube_info[face - 1].offset = idx_value;
@@ -278,11 +278,11 @@ int r200_packet0_check(struct radeon_cs_parser *p,
                 track->zb_dirty = true;
                 break;
         case RADEON_RB3D_COLORPITCH:
-                r = r100_cs_packet_next_reloc(p, &reloc);
+                r = radeon_cs_packet_next_reloc(p, &reloc, 0);
                 if (r) {
                         DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
                                   idx, reg);
-                        r100_cs_dump_packet(p, pkt);
+                        radeon_cs_dump_packet(p, pkt);
                         return r;
                 }
 
@@ -355,11 +355,11 @@ int r200_packet0_check(struct radeon_cs_parser *p,
                 track->zb_dirty = true;
                 break;
         case RADEON_RB3D_ZPASS_ADDR:
-                r = r100_cs_packet_next_reloc(p, &reloc);
+                r = radeon_cs_packet_next_reloc(p, &reloc, 0);
                 if (r) {
                         DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
                                   idx, reg);
-                        r100_cs_dump_packet(p, pkt);
+                        radeon_cs_dump_packet(p, pkt);
                         return r;
                 }
                 ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);