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path: root/drivers/gpu/drm/radeon/r100.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/r100.c')
-rw-r--r--drivers/gpu/drm/radeon/r100.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 5968dde243e9..5f15820efe12 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -1031,8 +1031,8 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size)
1031 WREG32(RADEON_CP_CSQ_MODE, 1031 WREG32(RADEON_CP_CSQ_MODE,
1032 REG_SET(RADEON_INDIRECT2_START, indirect2_start) | 1032 REG_SET(RADEON_INDIRECT2_START, indirect2_start) |
1033 REG_SET(RADEON_INDIRECT1_START, indirect1_start)); 1033 REG_SET(RADEON_INDIRECT1_START, indirect1_start));
1034 WREG32(0x718, 0); 1034 WREG32(RADEON_CP_RB_WPTR_DELAY, 0);
1035 WREG32(0x744, 0x00004D4D); 1035 WREG32(RADEON_CP_CSQ_MODE, 0x00004D4D);
1036 WREG32(RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIBM_INDBM); 1036 WREG32(RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIBM_INDBM);
1037 radeon_ring_start(rdev); 1037 radeon_ring_start(rdev);
1038 r = radeon_ring_test(rdev); 1038 r = radeon_ring_test(rdev);
@@ -2347,10 +2347,10 @@ void r100_vga_set_state(struct radeon_device *rdev, bool state)
2347 2347
2348 temp = RREG32(RADEON_CONFIG_CNTL); 2348 temp = RREG32(RADEON_CONFIG_CNTL);
2349 if (state == false) { 2349 if (state == false) {
2350 temp &= ~(1<<8); 2350 temp &= ~RADEON_CFG_VGA_RAM_EN;
2351 temp |= (1<<9); 2351 temp |= RADEON_CFG_VGA_IO_DIS;
2352 } else { 2352 } else {
2353 temp &= ~(1<<9); 2353 temp &= ~RADEON_CFG_VGA_IO_DIS;
2354 } 2354 }
2355 WREG32(RADEON_CONFIG_CNTL, temp); 2355 WREG32(RADEON_CONFIG_CNTL, temp);
2356} 2356}