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path: root/drivers/gpu/drm/radeon/r100.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/r100.c')
-rw-r--r--drivers/gpu/drm/radeon/r100.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index ad158ea49901..bfc08f6320f8 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -187,13 +187,18 @@ u32 r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base)
187{ 187{
188 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; 188 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];
189 u32 tmp = ((u32)crtc_base) | RADEON_CRTC_OFFSET__OFFSET_LOCK; 189 u32 tmp = ((u32)crtc_base) | RADEON_CRTC_OFFSET__OFFSET_LOCK;
190 int i;
190 191
191 /* Lock the graphics update lock */ 192 /* Lock the graphics update lock */
192 /* update the scanout addresses */ 193 /* update the scanout addresses */
193 WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp); 194 WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp);
194 195
195 /* Wait for update_pending to go high. */ 196 /* Wait for update_pending to go high. */
196 while (!(RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET)); 197 for (i = 0; i < rdev->usec_timeout; i++) {
198 if (RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET)
199 break;
200 udelay(1);
201 }
197 DRM_DEBUG("Update pending now high. Unlocking vupdate_lock.\n"); 202 DRM_DEBUG("Update pending now high. Unlocking vupdate_lock.\n");
198 203
199 /* Unlock the lock, so double-buffering can take place inside vblank */ 204 /* Unlock the lock, so double-buffering can take place inside vblank */