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path: root/drivers/gpu/drm/radeon/ppsmc.h
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Diffstat (limited to 'drivers/gpu/drm/radeon/ppsmc.h')
-rw-r--r--drivers/gpu/drm/radeon/ppsmc.h13
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/ppsmc.h b/drivers/gpu/drm/radeon/ppsmc.h
index 0f6ccce27a35..8fb1113a8fd7 100644
--- a/drivers/gpu/drm/radeon/ppsmc.h
+++ b/drivers/gpu/drm/radeon/ppsmc.h
@@ -26,6 +26,9 @@
26#pragma pack(push, 1) 26#pragma pack(push, 1)
27 27
28#define PPSMC_SWSTATE_FLAG_DC 0x01 28#define PPSMC_SWSTATE_FLAG_DC 0x01
29#define PPSMC_SWSTATE_FLAG_UVD 0x02
30#define PPSMC_SWSTATE_FLAG_VCE 0x04
31#define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08
29 32
30#define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00 33#define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
31#define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01 34#define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
@@ -36,17 +39,22 @@
36#define PPSMC_SYSTEMFLAG_GDDR5 0x04 39#define PPSMC_SYSTEMFLAG_GDDR5 0x04
37#define PPSMC_SYSTEMFLAG_DISABLE_BABYSTEP 0x08 40#define PPSMC_SYSTEMFLAG_DISABLE_BABYSTEP 0x08
38#define PPSMC_SYSTEMFLAG_REGULATOR_HOT 0x10 41#define PPSMC_SYSTEMFLAG_REGULATOR_HOT 0x10
42#define PPSMC_SYSTEMFLAG_REGULATOR_HOT_ANALOG 0x20
43#define PPSMC_SYSTEMFLAG_REGULATOR_HOT_PROG_GPIO 0x40
39 44
40#define PPSMC_EXTRAFLAGS_AC2DC_ACTION_MASK 0x07 45#define PPSMC_EXTRAFLAGS_AC2DC_ACTION_MASK 0x07
41#define PPSMC_EXTRAFLAGS_AC2DC_DONT_WAIT_FOR_VBLANK 0x08 46#define PPSMC_EXTRAFLAGS_AC2DC_DONT_WAIT_FOR_VBLANK 0x08
42#define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTODPMLOWSTATE 0x00 47#define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTODPMLOWSTATE 0x00
43#define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTOINITIALSTATE 0x01 48#define PPSMC_EXTRAFLAGS_AC2DC_ACTION_GOTOINITIALSTATE 0x01
49#define PPSMC_EXTRAFLAGS_AC2DC_GPIO5_POLARITY_HIGH 0x02
44 50
45#define PPSMC_DISPLAY_WATERMARK_LOW 0 51#define PPSMC_DISPLAY_WATERMARK_LOW 0
46#define PPSMC_DISPLAY_WATERMARK_HIGH 1 52#define PPSMC_DISPLAY_WATERMARK_HIGH 1
47 53
48#define PPSMC_STATEFLAG_AUTO_PULSE_SKIP 0x01 54#define PPSMC_STATEFLAG_AUTO_PULSE_SKIP 0x01
49#define PPSMC_STATEFLAG_POWERBOOST 0x02 55#define PPSMC_STATEFLAG_POWERBOOST 0x02
56#define PPSMC_STATEFLAG_DEEPSLEEP_THROTTLE 0x20
57#define PPSMC_STATEFLAG_DEEPSLEEP_BYPASS 0x40
50 58
51#define PPSMC_Result_OK ((uint8_t)0x01) 59#define PPSMC_Result_OK ((uint8_t)0x01)
52#define PPSMC_Result_Failed ((uint8_t)0xFF) 60#define PPSMC_Result_Failed ((uint8_t)0xFF)
@@ -80,9 +88,14 @@ typedef uint8_t PPSMC_Result;
80#define PPSMC_CACLongTermAvgEnable ((uint8_t)0x6E) 88#define PPSMC_CACLongTermAvgEnable ((uint8_t)0x6E)
81#define PPSMC_CACLongTermAvgDisable ((uint8_t)0x6F) 89#define PPSMC_CACLongTermAvgDisable ((uint8_t)0x6F)
82#define PPSMC_MSG_CollectCAC_PowerCorreln ((uint8_t)0x7A) 90#define PPSMC_MSG_CollectCAC_PowerCorreln ((uint8_t)0x7A)
91#define PPSMC_FlushDataCache ((uint8_t)0x80)
83#define PPSMC_MSG_SetEnabledLevels ((uint8_t)0x82) 92#define PPSMC_MSG_SetEnabledLevels ((uint8_t)0x82)
84#define PPSMC_MSG_SetForcedLevels ((uint8_t)0x83) 93#define PPSMC_MSG_SetForcedLevels ((uint8_t)0x83)
85#define PPSMC_MSG_ResetToDefaults ((uint8_t)0x84) 94#define PPSMC_MSG_ResetToDefaults ((uint8_t)0x84)
95#define PPSMC_MSG_EnableDTE ((uint8_t)0x87)
96#define PPSMC_MSG_DisableDTE ((uint8_t)0x88)
97#define PPSMC_MSG_ThrottleOVRDSCLKDS ((uint8_t)0x96)
98#define PPSMC_MSG_CancelThrottleOVRDSCLKDS ((uint8_t)0x97)
86 99
87/* TN */ 100/* TN */
88#define PPSMC_MSG_DPM_Config ((uint32_t) 0x102) 101#define PPSMC_MSG_DPM_Config ((uint32_t) 0x102)