aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/radeon/ni_dma.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/radeon/ni_dma.c')
-rw-r--r--drivers/gpu/drm/radeon/ni_dma.c17
1 files changed, 7 insertions, 10 deletions
diff --git a/drivers/gpu/drm/radeon/ni_dma.c b/drivers/gpu/drm/radeon/ni_dma.c
index f26f0a9fb522..50f88611ff60 100644
--- a/drivers/gpu/drm/radeon/ni_dma.c
+++ b/drivers/gpu/drm/radeon/ni_dma.c
@@ -123,6 +123,7 @@ void cayman_dma_ring_ib_execute(struct radeon_device *rdev,
123 struct radeon_ib *ib) 123 struct radeon_ib *ib)
124{ 124{
125 struct radeon_ring *ring = &rdev->ring[ib->ring]; 125 struct radeon_ring *ring = &rdev->ring[ib->ring];
126 unsigned vm_id = ib->vm ? ib->vm->ids[ib->ring].id : 0;
126 127
127 if (rdev->wb.enabled) { 128 if (rdev->wb.enabled) {
128 u32 next_rptr = ring->wptr + 4; 129 u32 next_rptr = ring->wptr + 4;
@@ -140,7 +141,7 @@ void cayman_dma_ring_ib_execute(struct radeon_device *rdev,
140 */ 141 */
141 while ((ring->wptr & 7) != 5) 142 while ((ring->wptr & 7) != 5)
142 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0)); 143 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0));
143 radeon_ring_write(ring, DMA_IB_PACKET(DMA_PACKET_INDIRECT_BUFFER, ib->vm ? ib->vm->id : 0, 0)); 144 radeon_ring_write(ring, DMA_IB_PACKET(DMA_PACKET_INDIRECT_BUFFER, vm_id, 0));
144 radeon_ring_write(ring, (ib->gpu_addr & 0xFFFFFFE0)); 145 radeon_ring_write(ring, (ib->gpu_addr & 0xFFFFFFE0));
145 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); 146 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF));
146 147
@@ -446,16 +447,12 @@ void cayman_dma_vm_pad_ib(struct radeon_ib *ib)
446 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0); 447 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_NOP, 0, 0, 0);
447} 448}
448 449
449void cayman_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) 450void cayman_dma_vm_flush(struct radeon_device *rdev, struct radeon_ring *ring,
451 unsigned vm_id, uint64_t pd_addr)
450{ 452{
451 struct radeon_ring *ring = &rdev->ring[ridx];
452
453 if (vm == NULL)
454 return;
455
456 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SRBM_WRITE, 0, 0, 0)); 453 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SRBM_WRITE, 0, 0, 0));
457 radeon_ring_write(ring, (0xf << 16) | ((VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (vm->id << 2)) >> 2)); 454 radeon_ring_write(ring, (0xf << 16) | ((VM_CONTEXT0_PAGE_TABLE_BASE_ADDR + (vm_id << 2)) >> 2));
458 radeon_ring_write(ring, vm->pd_gpu_addr >> 12); 455 radeon_ring_write(ring, pd_addr >> 12);
459 456
460 /* flush hdp cache */ 457 /* flush hdp cache */
461 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SRBM_WRITE, 0, 0, 0)); 458 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SRBM_WRITE, 0, 0, 0));
@@ -465,6 +462,6 @@ void cayman_dma_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm
465 /* bits 0-7 are the VM contexts0-7 */ 462 /* bits 0-7 are the VM contexts0-7 */
466 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SRBM_WRITE, 0, 0, 0)); 463 radeon_ring_write(ring, DMA_PACKET(DMA_PACKET_SRBM_WRITE, 0, 0, 0));
467 radeon_ring_write(ring, (0xf << 16) | (VM_INVALIDATE_REQUEST >> 2)); 464 radeon_ring_write(ring, (0xf << 16) | (VM_INVALIDATE_REQUEST >> 2));
468 radeon_ring_write(ring, 1 << vm->id); 465 radeon_ring_write(ring, 1 << vm_id);
469} 466}
470 467