diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreen.c')
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 9073e3bfb08c..7c37638095f7 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -1578,7 +1578,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev) | |||
1578 | u32 sq_stack_resource_mgmt_2; | 1578 | u32 sq_stack_resource_mgmt_2; |
1579 | u32 sq_stack_resource_mgmt_3; | 1579 | u32 sq_stack_resource_mgmt_3; |
1580 | u32 vgt_cache_invalidation; | 1580 | u32 vgt_cache_invalidation; |
1581 | u32 hdp_host_path_cntl; | 1581 | u32 hdp_host_path_cntl, tmp; |
1582 | int i, j, num_shader_engines, ps_thread_count; | 1582 | int i, j, num_shader_engines, ps_thread_count; |
1583 | 1583 | ||
1584 | switch (rdev->family) { | 1584 | switch (rdev->family) { |
@@ -1936,8 +1936,12 @@ static void evergreen_gpu_init(struct radeon_device *rdev) | |||
1936 | rdev->config.evergreen.tile_config |= (3 << 0); | 1936 | rdev->config.evergreen.tile_config |= (3 << 0); |
1937 | break; | 1937 | break; |
1938 | } | 1938 | } |
1939 | rdev->config.evergreen.tile_config |= | 1939 | /* num banks is 8 on all fusion asics */ |
1940 | ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4; | 1940 | if (rdev->flags & RADEON_IS_IGP) |
1941 | rdev->config.evergreen.tile_config |= 8 << 4; | ||
1942 | else | ||
1943 | rdev->config.evergreen.tile_config |= | ||
1944 | ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4; | ||
1941 | rdev->config.evergreen.tile_config |= | 1945 | rdev->config.evergreen.tile_config |= |
1942 | ((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT) << 8; | 1946 | ((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT) << 8; |
1943 | rdev->config.evergreen.tile_config |= | 1947 | rdev->config.evergreen.tile_config |= |
@@ -2141,6 +2145,10 @@ static void evergreen_gpu_init(struct radeon_device *rdev) | |||
2141 | for (i = SQ_ALU_CONST_BUFFER_SIZE_HS_0; i < 0x29000; i += 4) | 2145 | for (i = SQ_ALU_CONST_BUFFER_SIZE_HS_0; i < 0x29000; i += 4) |
2142 | WREG32(i, 0); | 2146 | WREG32(i, 0); |
2143 | 2147 | ||
2148 | tmp = RREG32(HDP_MISC_CNTL); | ||
2149 | tmp |= HDP_FLUSH_INVALIDATE_CACHE; | ||
2150 | WREG32(HDP_MISC_CNTL, tmp); | ||
2151 | |||
2144 | hdp_host_path_cntl = RREG32(HDP_HOST_PATH_CNTL); | 2152 | hdp_host_path_cntl = RREG32(HDP_HOST_PATH_CNTL); |
2145 | WREG32(HDP_HOST_PATH_CNTL, hdp_host_path_cntl); | 2153 | WREG32(HDP_HOST_PATH_CNTL, hdp_host_path_cntl); |
2146 | 2154 | ||