aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/radeon/evergreen.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreen.c')
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 336f0a56edce..0318230ef274 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -4789,7 +4789,7 @@ restart_ih:
4789 wake_up(&rdev->irq.vblank_queue); 4789 wake_up(&rdev->irq.vblank_queue);
4790 } 4790 }
4791 if (atomic_read(&rdev->irq.pflip[0])) 4791 if (atomic_read(&rdev->irq.pflip[0]))
4792 radeon_crtc_handle_flip(rdev, 0); 4792 radeon_crtc_handle_vblank(rdev, 0);
4793 rdev->irq.stat_regs.evergreen.disp_int &= ~LB_D1_VBLANK_INTERRUPT; 4793 rdev->irq.stat_regs.evergreen.disp_int &= ~LB_D1_VBLANK_INTERRUPT;
4794 DRM_DEBUG("IH: D1 vblank\n"); 4794 DRM_DEBUG("IH: D1 vblank\n");
4795 } 4795 }
@@ -4815,7 +4815,7 @@ restart_ih:
4815 wake_up(&rdev->irq.vblank_queue); 4815 wake_up(&rdev->irq.vblank_queue);
4816 } 4816 }
4817 if (atomic_read(&rdev->irq.pflip[1])) 4817 if (atomic_read(&rdev->irq.pflip[1]))
4818 radeon_crtc_handle_flip(rdev, 1); 4818 radeon_crtc_handle_vblank(rdev, 1);
4819 rdev->irq.stat_regs.evergreen.disp_int_cont &= ~LB_D2_VBLANK_INTERRUPT; 4819 rdev->irq.stat_regs.evergreen.disp_int_cont &= ~LB_D2_VBLANK_INTERRUPT;
4820 DRM_DEBUG("IH: D2 vblank\n"); 4820 DRM_DEBUG("IH: D2 vblank\n");
4821 } 4821 }
@@ -4841,7 +4841,7 @@ restart_ih:
4841 wake_up(&rdev->irq.vblank_queue); 4841 wake_up(&rdev->irq.vblank_queue);
4842 } 4842 }
4843 if (atomic_read(&rdev->irq.pflip[2])) 4843 if (atomic_read(&rdev->irq.pflip[2]))
4844 radeon_crtc_handle_flip(rdev, 2); 4844 radeon_crtc_handle_vblank(rdev, 2);
4845 rdev->irq.stat_regs.evergreen.disp_int_cont2 &= ~LB_D3_VBLANK_INTERRUPT; 4845 rdev->irq.stat_regs.evergreen.disp_int_cont2 &= ~LB_D3_VBLANK_INTERRUPT;
4846 DRM_DEBUG("IH: D3 vblank\n"); 4846 DRM_DEBUG("IH: D3 vblank\n");
4847 } 4847 }
@@ -4867,7 +4867,7 @@ restart_ih:
4867 wake_up(&rdev->irq.vblank_queue); 4867 wake_up(&rdev->irq.vblank_queue);
4868 } 4868 }
4869 if (atomic_read(&rdev->irq.pflip[3])) 4869 if (atomic_read(&rdev->irq.pflip[3]))
4870 radeon_crtc_handle_flip(rdev, 3); 4870 radeon_crtc_handle_vblank(rdev, 3);
4871 rdev->irq.stat_regs.evergreen.disp_int_cont3 &= ~LB_D4_VBLANK_INTERRUPT; 4871 rdev->irq.stat_regs.evergreen.disp_int_cont3 &= ~LB_D4_VBLANK_INTERRUPT;
4872 DRM_DEBUG("IH: D4 vblank\n"); 4872 DRM_DEBUG("IH: D4 vblank\n");
4873 } 4873 }
@@ -4893,7 +4893,7 @@ restart_ih:
4893 wake_up(&rdev->irq.vblank_queue); 4893 wake_up(&rdev->irq.vblank_queue);
4894 } 4894 }
4895 if (atomic_read(&rdev->irq.pflip[4])) 4895 if (atomic_read(&rdev->irq.pflip[4]))
4896 radeon_crtc_handle_flip(rdev, 4); 4896 radeon_crtc_handle_vblank(rdev, 4);
4897 rdev->irq.stat_regs.evergreen.disp_int_cont4 &= ~LB_D5_VBLANK_INTERRUPT; 4897 rdev->irq.stat_regs.evergreen.disp_int_cont4 &= ~LB_D5_VBLANK_INTERRUPT;
4898 DRM_DEBUG("IH: D5 vblank\n"); 4898 DRM_DEBUG("IH: D5 vblank\n");
4899 } 4899 }
@@ -4919,7 +4919,7 @@ restart_ih:
4919 wake_up(&rdev->irq.vblank_queue); 4919 wake_up(&rdev->irq.vblank_queue);
4920 } 4920 }
4921 if (atomic_read(&rdev->irq.pflip[5])) 4921 if (atomic_read(&rdev->irq.pflip[5]))
4922 radeon_crtc_handle_flip(rdev, 5); 4922 radeon_crtc_handle_vblank(rdev, 5);
4923 rdev->irq.stat_regs.evergreen.disp_int_cont5 &= ~LB_D6_VBLANK_INTERRUPT; 4923 rdev->irq.stat_regs.evergreen.disp_int_cont5 &= ~LB_D6_VBLANK_INTERRUPT;
4924 DRM_DEBUG("IH: D6 vblank\n"); 4924 DRM_DEBUG("IH: D6 vblank\n");
4925 } 4925 }