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path: root/drivers/gpu/drm/radeon/evergreen.c
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Diffstat (limited to 'drivers/gpu/drm/radeon/evergreen.c')
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c51
1 files changed, 11 insertions, 40 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 3368920df5f4..3f973d411d61 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -439,7 +439,6 @@ int evergreen_mc_init(struct radeon_device *rdev)
439 fixed20_12 a; 439 fixed20_12 a;
440 u32 tmp; 440 u32 tmp;
441 int chansize, numchan; 441 int chansize, numchan;
442 int r;
443 442
444 /* Get VRAM informations */ 443 /* Get VRAM informations */
445 rdev->mc.vram_is_ddr = true; 444 rdev->mc.vram_is_ddr = true;
@@ -475,48 +474,12 @@ int evergreen_mc_init(struct radeon_device *rdev)
475 /* size in MB on evergreen */ 474 /* size in MB on evergreen */
476 rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; 475 rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;
477 rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; 476 rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;
478 477 /* FIXME remove this once we support unmappable VRAM */
479 if (rdev->mc.mc_vram_size > rdev->mc.aper_size) 478 if (rdev->mc.mc_vram_size > rdev->mc.aper_size) {
480 rdev->mc.mc_vram_size = rdev->mc.aper_size; 479 rdev->mc.mc_vram_size = rdev->mc.aper_size;
481
482 if (rdev->mc.real_vram_size > rdev->mc.aper_size)
483 rdev->mc.real_vram_size = rdev->mc.aper_size; 480 rdev->mc.real_vram_size = rdev->mc.aper_size;
484
485 if (rdev->flags & RADEON_IS_AGP) {
486 r = radeon_agp_init(rdev);
487 if (r)
488 return r;
489 /* gtt_size is setup by radeon_agp_init */
490 rdev->mc.gtt_location = rdev->mc.agp_base;
491 tmp = 0xFFFFFFFFUL - rdev->mc.agp_base - rdev->mc.gtt_size;
492 /* Try to put vram before or after AGP because we
493 * we want SYSTEM_APERTURE to cover both VRAM and
494 * AGP so that GPU can catch out of VRAM/AGP access
495 */
496 if (rdev->mc.gtt_location > rdev->mc.mc_vram_size) {
497 /* Enought place before */
498 rdev->mc.vram_location = rdev->mc.gtt_location -
499 rdev->mc.mc_vram_size;
500 } else if (tmp > rdev->mc.mc_vram_size) {
501 /* Enought place after */
502 rdev->mc.vram_location = rdev->mc.gtt_location +
503 rdev->mc.gtt_size;
504 } else {
505 /* Try to setup VRAM then AGP might not
506 * not work on some card
507 */
508 rdev->mc.vram_location = 0x00000000UL;
509 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
510 }
511 } else {
512 rdev->mc.vram_location = 0x00000000UL;
513 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
514 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
515 } 481 }
516 rdev->mc.vram_start = rdev->mc.vram_location; 482 r600_vram_gtt_location(rdev, &rdev->mc);
517 rdev->mc.vram_end = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
518 rdev->mc.gtt_start = rdev->mc.gtt_location;
519 rdev->mc.gtt_end = rdev->mc.gtt_location + rdev->mc.gtt_size - 1;
520 /* FIXME: we should enforce default clock in case GPU is not in 483 /* FIXME: we should enforce default clock in case GPU is not in
521 * default setup 484 * default setup
522 */ 485 */
@@ -525,6 +488,7 @@ int evergreen_mc_init(struct radeon_device *rdev)
525 rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a); 488 rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);
526 return 0; 489 return 0;
527} 490}
491
528int evergreen_gpu_reset(struct radeon_device *rdev) 492int evergreen_gpu_reset(struct radeon_device *rdev)
529{ 493{
530 /* FIXME: implement for evergreen */ 494 /* FIXME: implement for evergreen */
@@ -726,6 +690,13 @@ int evergreen_init(struct radeon_device *rdev)
726 r = radeon_fence_driver_init(rdev); 690 r = radeon_fence_driver_init(rdev);
727 if (r) 691 if (r)
728 return r; 692 return r;
693 /* initialize AGP */
694 if (rdev->flags & RADEON_IS_AGP) {
695 r = radeon_agp_init(rdev);
696 if (r)
697 radeon_agp_disable(rdev);
698 }
699 /* initialize memory controller */
729 r = evergreen_mc_init(rdev); 700 r = evergreen_mc_init(rdev);
730 if (r) 701 if (r)
731 return r; 702 return r;