1 files changed, 58 insertions, 8 deletions

diff --git a/drivers/gpu/drm/radeon/dce6_afmt.c b/drivers/gpu/drm/radeon/dce6_afmt.c
index 9fcd338c0fcf..009f46e0ce72 100644
--- a/drivers/gpu/drm/radeon/dce6_afmt.c
+++ b/drivers/gpu/drm/radeon/dce6_afmt.c
@@ -102,6 +102,49 @@ void dce6_afmt_select_pin(struct drm_encoder *encoder)
                AFMT_AUDIO_SRC_SELECT(dig->afmt->pin->id));
 }
 
+void dce6_afmt_write_latency_fields(struct drm_encoder *encoder,
+                                    struct drm_display_mode *mode)
+{
+        struct radeon_device *rdev = encoder->dev->dev_private;
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
+        struct drm_connector *connector;
+        struct radeon_connector *radeon_connector = NULL;
+        u32 tmp = 0, offset;
+
+        if (!dig->afmt->pin)
+                return;
+
+        offset = dig->afmt->pin->offset;
+
+        list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
+                if (connector->encoder == encoder) {
+                        radeon_connector = to_radeon_connector(connector);
+                        break;
+                }
+        }
+
+        if (!radeon_connector) {
+                DRM_ERROR("Couldn't find encoder's connector\n");
+                return;
+        }
+
+        if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
+                if (connector->latency_present[1])
+                        tmp = VIDEO_LIPSYNC(connector->video_latency[1]) |
+                                AUDIO_LIPSYNC(connector->audio_latency[1]);
+                else
+                        tmp = VIDEO_LIPSYNC(255) | AUDIO_LIPSYNC(255);
+        } else {
+                if (connector->latency_present[0])
+                        tmp = VIDEO_LIPSYNC(connector->video_latency[0]) |
+                                AUDIO_LIPSYNC(connector->audio_latency[0]);
+                else
+                        tmp = VIDEO_LIPSYNC(255) | AUDIO_LIPSYNC(255);
+        }
+        WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC, tmp);
+}
+
 void dce6_afmt_write_speaker_allocation(struct drm_encoder *encoder)
 {
         struct radeon_device *rdev = encoder->dev->dev_private;
@@ -113,9 +156,6 @@ void dce6_afmt_write_speaker_allocation(struct drm_encoder *encoder)
         u8 *sadb;
         int sad_count;
 
-        /* XXX: setting this register causes hangs on some asics */
-        return;
-
         if (!dig->afmt->pin)
                 return;
 
@@ -201,20 +241,30 @@ void dce6_afmt_write_sad_regs(struct drm_encoder *encoder)
 
         for (i = 0; i < ARRAY_SIZE(eld_reg_to_type); i++) {
                 u32 value = 0;
+                u8 stereo_freqs = 0;
+                int max_channels = -1;
                 int j;
 
                 for (j = 0; j < sad_count; j++) {
                         struct cea_sad *sad = &sads[j];
 
                         if (sad->format == eld_reg_to_type[i][1]) {
-                                value = MAX_CHANNELS(sad->channels) |
-                                        DESCRIPTOR_BYTE_2(sad->byte2) |
-                                        SUPPORTED_FREQUENCIES(sad->freq);
+                                if (sad->channels > max_channels) {
+                                        value = MAX_CHANNELS(sad->channels) |
+                                                DESCRIPTOR_BYTE_2(sad->byte2) |
+                                                SUPPORTED_FREQUENCIES(sad->freq);
+                                        max_channels = sad->channels;
+                                }
+
                                 if (sad->format == HDMI_AUDIO_CODING_TYPE_PCM)
-                                        value |= SUPPORTED_FREQUENCIES_STEREO(sad->freq);
-                                break;
+                                        stereo_freqs |= sad->freq;
+                                else
+                                        break;
                         }
                 }
+
+                value |= SUPPORTED_FREQUENCIES_STEREO(stereo_freqs);
+
                 WREG32_ENDPOINT(offset, eld_reg_to_type[i][0], value);
         }