diff options
Diffstat (limited to 'drivers/gpu/drm/radeon/cik_sdma.c')
-rw-r--r-- | drivers/gpu/drm/radeon/cik_sdma.c | 42 |
1 files changed, 24 insertions, 18 deletions
diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c index c77dad1a4576..d748963af08b 100644 --- a/drivers/gpu/drm/radeon/cik_sdma.c +++ b/drivers/gpu/drm/radeon/cik_sdma.c | |||
@@ -611,16 +611,19 @@ int cik_sdma_ring_test(struct radeon_device *rdev, | |||
611 | { | 611 | { |
612 | unsigned i; | 612 | unsigned i; |
613 | int r; | 613 | int r; |
614 | void __iomem *ptr = (void *)rdev->vram_scratch.ptr; | 614 | unsigned index; |
615 | u32 tmp; | 615 | u32 tmp; |
616 | u64 gpu_addr; | ||
616 | 617 | ||
617 | if (!ptr) { | 618 | if (ring->idx == R600_RING_TYPE_DMA_INDEX) |
618 | DRM_ERROR("invalid vram scratch pointer\n"); | 619 | index = R600_WB_DMA_RING_TEST_OFFSET; |
619 | return -EINVAL; | 620 | else |
620 | } | 621 | index = CAYMAN_WB_DMA1_RING_TEST_OFFSET; |
622 | |||
623 | gpu_addr = rdev->wb.gpu_addr + index; | ||
621 | 624 | ||
622 | tmp = 0xCAFEDEAD; | 625 | tmp = 0xCAFEDEAD; |
623 | writel(tmp, ptr); | 626 | rdev->wb.wb[index/4] = cpu_to_le32(tmp); |
624 | 627 | ||
625 | r = radeon_ring_lock(rdev, ring, 5); | 628 | r = radeon_ring_lock(rdev, ring, 5); |
626 | if (r) { | 629 | if (r) { |
@@ -628,14 +631,14 @@ int cik_sdma_ring_test(struct radeon_device *rdev, | |||
628 | return r; | 631 | return r; |
629 | } | 632 | } |
630 | radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0)); | 633 | radeon_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0)); |
631 | radeon_ring_write(ring, rdev->vram_scratch.gpu_addr & 0xfffffffc); | 634 | radeon_ring_write(ring, lower_32_bits(gpu_addr)); |
632 | radeon_ring_write(ring, upper_32_bits(rdev->vram_scratch.gpu_addr)); | 635 | radeon_ring_write(ring, upper_32_bits(gpu_addr)); |
633 | radeon_ring_write(ring, 1); /* number of DWs to follow */ | 636 | radeon_ring_write(ring, 1); /* number of DWs to follow */ |
634 | radeon_ring_write(ring, 0xDEADBEEF); | 637 | radeon_ring_write(ring, 0xDEADBEEF); |
635 | radeon_ring_unlock_commit(rdev, ring, false); | 638 | radeon_ring_unlock_commit(rdev, ring, false); |
636 | 639 | ||
637 | for (i = 0; i < rdev->usec_timeout; i++) { | 640 | for (i = 0; i < rdev->usec_timeout; i++) { |
638 | tmp = readl(ptr); | 641 | tmp = le32_to_cpu(rdev->wb.wb[index/4]); |
639 | if (tmp == 0xDEADBEEF) | 642 | if (tmp == 0xDEADBEEF) |
640 | break; | 643 | break; |
641 | DRM_UDELAY(1); | 644 | DRM_UDELAY(1); |
@@ -664,17 +667,20 @@ int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
664 | { | 667 | { |
665 | struct radeon_ib ib; | 668 | struct radeon_ib ib; |
666 | unsigned i; | 669 | unsigned i; |
670 | unsigned index; | ||
667 | int r; | 671 | int r; |
668 | void __iomem *ptr = (void *)rdev->vram_scratch.ptr; | ||
669 | u32 tmp = 0; | 672 | u32 tmp = 0; |
673 | u64 gpu_addr; | ||
670 | 674 | ||
671 | if (!ptr) { | 675 | if (ring->idx == R600_RING_TYPE_DMA_INDEX) |
672 | DRM_ERROR("invalid vram scratch pointer\n"); | 676 | index = R600_WB_DMA_RING_TEST_OFFSET; |
673 | return -EINVAL; | 677 | else |
674 | } | 678 | index = CAYMAN_WB_DMA1_RING_TEST_OFFSET; |
679 | |||
680 | gpu_addr = rdev->wb.gpu_addr + index; | ||
675 | 681 | ||
676 | tmp = 0xCAFEDEAD; | 682 | tmp = 0xCAFEDEAD; |
677 | writel(tmp, ptr); | 683 | rdev->wb.wb[index/4] = cpu_to_le32(tmp); |
678 | 684 | ||
679 | r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); | 685 | r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); |
680 | if (r) { | 686 | if (r) { |
@@ -683,8 +689,8 @@ int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
683 | } | 689 | } |
684 | 690 | ||
685 | ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0); | 691 | ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0); |
686 | ib.ptr[1] = rdev->vram_scratch.gpu_addr & 0xfffffffc; | 692 | ib.ptr[1] = lower_32_bits(gpu_addr); |
687 | ib.ptr[2] = upper_32_bits(rdev->vram_scratch.gpu_addr); | 693 | ib.ptr[2] = upper_32_bits(gpu_addr); |
688 | ib.ptr[3] = 1; | 694 | ib.ptr[3] = 1; |
689 | ib.ptr[4] = 0xDEADBEEF; | 695 | ib.ptr[4] = 0xDEADBEEF; |
690 | ib.length_dw = 5; | 696 | ib.length_dw = 5; |
@@ -701,7 +707,7 @@ int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
701 | return r; | 707 | return r; |
702 | } | 708 | } |
703 | for (i = 0; i < rdev->usec_timeout; i++) { | 709 | for (i = 0; i < rdev->usec_timeout; i++) { |
704 | tmp = readl(ptr); | 710 | tmp = le32_to_cpu(rdev->wb.wb[index/4]); |
705 | if (tmp == 0xDEADBEEF) | 711 | if (tmp == 0xDEADBEEF) |
706 | break; | 712 | break; |
707 | DRM_UDELAY(1); | 713 | DRM_UDELAY(1); |