1 files changed, 8 insertions, 0 deletions

diff --git a/drivers/gpu/drm/radeon/ci_dpm.h b/drivers/gpu/drm/radeon/ci_dpm.h
index 93bbed977ffb..84e3d3bcf9f3 100644
--- a/drivers/gpu/drm/radeon/ci_dpm.h
+++ b/drivers/gpu/drm/radeon/ci_dpm.h
@@ -33,6 +33,8 @@
 
 #define CISLANDS_MAX_HARDWARE_POWERLEVELS 2
 
+#define CISLANDS_UNUSED_GPIO_PIN 0x7F
+
 struct ci_pl {
         u32 mclk;
         u32 sclk;
@@ -237,6 +239,7 @@ struct ci_power_info {
         u32 sclk_dpm_key_disabled;
         u32 mclk_dpm_key_disabled;
         u32 pcie_dpm_key_disabled;
+        u32 thermal_sclk_dpm_enabled;
         struct ci_pcie_perf_range pcie_gen_performance;
         struct ci_pcie_perf_range pcie_lane_performance;
         struct ci_pcie_perf_range pcie_gen_powersaving;
@@ -264,6 +267,7 @@ struct ci_power_info {
         bool caps_automatic_dc_transition;
         bool caps_sclk_throttle_low_notification;
         bool caps_dynamic_ac_timing;
+        bool caps_od_fuzzy_fan_control_support;
         /* flags */
         bool thermal_protection;
         bool pcie_performance_request;
@@ -285,6 +289,10 @@ struct ci_power_info {
         struct ci_ps current_ps;
         struct radeon_ps requested_rps;
         struct ci_ps requested_ps;
+        /* fan control */
+        bool fan_ctrl_is_in_default_mode;
+        u32 t_min;
+        u32 fan_ctrl_default_mode;
 };
 
 #define CISLANDS_VOLTAGE_CONTROL_NONE                   0x0