1 files changed, 41 insertions, 18 deletions

diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index c15287a590ff..260fcf59f00c 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -241,6 +241,7 @@ void atombios_crtc_dpms(struct drm_crtc *crtc, int mode)
 {
         struct drm_device *dev = crtc->dev;
         struct radeon_device *rdev = dev->dev_private;
+        struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 
         switch (mode) {
         case DRM_MODE_DPMS_ON:
@@ -248,20 +249,19 @@ void atombios_crtc_dpms(struct drm_crtc *crtc, int mode)
                 if (ASIC_IS_DCE3(rdev))
                         atombios_enable_crtc_memreq(crtc, 1);
                 atombios_blank_crtc(crtc, 0);
+                drm_vblank_post_modeset(dev, radeon_crtc->crtc_id);
+                radeon_crtc_load_lut(crtc);
                 break;
         case DRM_MODE_DPMS_STANDBY:
         case DRM_MODE_DPMS_SUSPEND:
         case DRM_MODE_DPMS_OFF:
+                drm_vblank_pre_modeset(dev, radeon_crtc->crtc_id);
                 atombios_blank_crtc(crtc, 1);
                 if (ASIC_IS_DCE3(rdev))
                         atombios_enable_crtc_memreq(crtc, 0);
                 atombios_enable_crtc(crtc, 0);
                 break;
         }
-
-        if (mode != DRM_MODE_DPMS_OFF) {
-                radeon_crtc_load_lut(crtc);
-        }
 }
 
 static void
@@ -457,9 +457,8 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
                                 if (encoder->encoder_type !=
                                     DRM_MODE_ENCODER_DAC)
                                         pll_flags |= RADEON_PLL_NO_ODD_POST_DIV;
-                                if (!ASIC_IS_AVIVO(rdev)
-                                    && (encoder->encoder_type ==
-                                        DRM_MODE_ENCODER_LVDS))
+                                if (encoder->encoder_type ==
+                                        DRM_MODE_ENCODER_LVDS)
                                         pll_flags |= RADEON_PLL_USE_REF_DIV;
                         }
                         radeon_encoder = to_radeon_encoder(encoder);
@@ -500,8 +499,18 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
         else
                 pll = &rdev->clock.p2pll;
 
-        radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div,
-                           &ref_div, &post_div, pll_flags);
+        if (ASIC_IS_AVIVO(rdev)) {
+                if (radeon_new_pll)
+                        radeon_compute_pll_avivo(pll, adjusted_clock, &pll_clock,
+                                                 &fb_div, &frac_fb_div,
+                                                 &ref_div, &post_div, pll_flags);
+                else
+                        radeon_compute_pll(pll, adjusted_clock, &pll_clock,
+                                           &fb_div, &frac_fb_div,
+                                           &ref_div, &post_div, pll_flags);
+        } else
+                radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div,
+                                   &ref_div, &post_div, pll_flags);
 
         index = GetIndexIntoMasterTable(COMMAND, SetPixelClock);
         atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev,
@@ -574,21 +583,32 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
         struct radeon_device *rdev = dev->dev_private;
         struct radeon_framebuffer *radeon_fb;
         struct drm_gem_object *obj;
-        struct drm_radeon_gem_object *obj_priv;
+        struct radeon_bo *rbo;
         uint64_t fb_location;
         uint32_t fb_format, fb_pitch_pixels, tiling_flags;
+        int r;
 
-        if (!crtc->fb)
-                return -EINVAL;
+        /* no fb bound */
+        if (!crtc->fb) {
+                DRM_DEBUG("No FB bound\n");
+                return 0;
+        }
 
         radeon_fb = to_radeon_framebuffer(crtc->fb);
 
+        /* Pin framebuffer & get tilling informations */
         obj = radeon_fb->obj;
-        obj_priv = obj->driver_private;
-
-        if (radeon_gem_object_pin(obj, RADEON_GEM_DOMAIN_VRAM, &fb_location)) {
+        rbo = obj->driver_private;
+        r = radeon_bo_reserve(rbo, false);
+        if (unlikely(r != 0))
+                return r;
+        r = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &fb_location);
+        if (unlikely(r != 0)) {
+                radeon_bo_unreserve(rbo);
                 return -EINVAL;
         }
+        radeon_bo_get_tiling_flags(rbo, &tiling_flags, NULL);
+        radeon_bo_unreserve(rbo);
 
         switch (crtc->fb->bits_per_pixel) {
         case 8:
@@ -618,8 +638,6 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
                 return -EINVAL;
         }
 
-        radeon_object_get_tiling_flags(obj->driver_private,
-                                       &tiling_flags, NULL);
         if (tiling_flags & RADEON_TILING_MACRO)
                 fb_format |= AVIVO_D1GRPH_MACRO_ADDRESS_MODE;
 
@@ -674,7 +692,12 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
 
         if (old_fb && old_fb != crtc->fb) {
                 radeon_fb = to_radeon_framebuffer(old_fb);
-                radeon_gem_object_unpin(radeon_fb->obj);
+                rbo = radeon_fb->obj->driver_private;
+                r = radeon_bo_reserve(rbo, false);
+                if (unlikely(r != 0))
+                        return r;
+                radeon_bo_unpin(rbo);
+                radeon_bo_unreserve(rbo);
         }
 
         /* Bytes per pixel may have changed */