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-rw-r--r--drivers/gpu/drm/r128/r128_cce.c52
-rw-r--r--drivers/gpu/drm/r128/r128_drv.c2
-rw-r--r--drivers/gpu/drm/r128/r128_drv.h122
-rw-r--r--drivers/gpu/drm/r128/r128_irq.c4
-rw-r--r--drivers/gpu/drm/r128/r128_state.c121
5 files changed, 139 insertions, 162 deletions
diff --git a/drivers/gpu/drm/r128/r128_cce.c b/drivers/gpu/drm/r128/r128_cce.c
index e671d0e74d4c..570e190710bd 100644
--- a/drivers/gpu/drm/r128/r128_cce.c
+++ b/drivers/gpu/drm/r128/r128_cce.c
@@ -44,7 +44,7 @@
44 44
45MODULE_FIRMWARE(FIRMWARE_NAME); 45MODULE_FIRMWARE(FIRMWARE_NAME);
46 46
47static int R128_READ_PLL(struct drm_device * dev, int addr) 47static int R128_READ_PLL(struct drm_device *dev, int addr)
48{ 48{
49 drm_r128_private_t *dev_priv = dev->dev_private; 49 drm_r128_private_t *dev_priv = dev->dev_private;
50 50
@@ -53,7 +53,7 @@ static int R128_READ_PLL(struct drm_device * dev, int addr)
53} 53}
54 54
55#if R128_FIFO_DEBUG 55#if R128_FIFO_DEBUG
56static void r128_status(drm_r128_private_t * dev_priv) 56static void r128_status(drm_r128_private_t *dev_priv)
57{ 57{
58 printk("GUI_STAT = 0x%08x\n", 58 printk("GUI_STAT = 0x%08x\n",
59 (unsigned int)R128_READ(R128_GUI_STAT)); 59 (unsigned int)R128_READ(R128_GUI_STAT));
@@ -74,7 +74,7 @@ static void r128_status(drm_r128_private_t * dev_priv)
74 * Engine, FIFO control 74 * Engine, FIFO control
75 */ 75 */
76 76
77static int r128_do_pixcache_flush(drm_r128_private_t * dev_priv) 77static int r128_do_pixcache_flush(drm_r128_private_t *dev_priv)
78{ 78{
79 u32 tmp; 79 u32 tmp;
80 int i; 80 int i;
@@ -83,9 +83,8 @@ static int r128_do_pixcache_flush(drm_r128_private_t * dev_priv)
83 R128_WRITE(R128_PC_NGUI_CTLSTAT, tmp); 83 R128_WRITE(R128_PC_NGUI_CTLSTAT, tmp);
84 84
85 for (i = 0; i < dev_priv->usec_timeout; i++) { 85 for (i = 0; i < dev_priv->usec_timeout; i++) {
86 if (!(R128_READ(R128_PC_NGUI_CTLSTAT) & R128_PC_BUSY)) { 86 if (!(R128_READ(R128_PC_NGUI_CTLSTAT) & R128_PC_BUSY))
87 return 0; 87 return 0;
88 }
89 DRM_UDELAY(1); 88 DRM_UDELAY(1);
90 } 89 }
91 90
@@ -95,7 +94,7 @@ static int r128_do_pixcache_flush(drm_r128_private_t * dev_priv)
95 return -EBUSY; 94 return -EBUSY;
96} 95}
97 96
98static int r128_do_wait_for_fifo(drm_r128_private_t * dev_priv, int entries) 97static int r128_do_wait_for_fifo(drm_r128_private_t *dev_priv, int entries)
99{ 98{
100 int i; 99 int i;
101 100
@@ -112,7 +111,7 @@ static int r128_do_wait_for_fifo(drm_r128_private_t * dev_priv, int entries)
112 return -EBUSY; 111 return -EBUSY;
113} 112}
114 113
115static int r128_do_wait_for_idle(drm_r128_private_t * dev_priv) 114static int r128_do_wait_for_idle(drm_r128_private_t *dev_priv)
116{ 115{
117 int i, ret; 116 int i, ret;
118 117
@@ -189,7 +188,7 @@ out_release:
189 * prior to a wait for idle, as it informs the engine that the command 188 * prior to a wait for idle, as it informs the engine that the command
190 * stream is ending. 189 * stream is ending.
191 */ 190 */
192static void r128_do_cce_flush(drm_r128_private_t * dev_priv) 191static void r128_do_cce_flush(drm_r128_private_t *dev_priv)
193{ 192{
194 u32 tmp; 193 u32 tmp;
195 194
@@ -199,7 +198,7 @@ static void r128_do_cce_flush(drm_r128_private_t * dev_priv)
199 198
200/* Wait for the CCE to go idle. 199/* Wait for the CCE to go idle.
201 */ 200 */
202int r128_do_cce_idle(drm_r128_private_t * dev_priv) 201int r128_do_cce_idle(drm_r128_private_t *dev_priv)
203{ 202{
204 int i; 203 int i;
205 204
@@ -225,7 +224,7 @@ int r128_do_cce_idle(drm_r128_private_t * dev_priv)
225 224
226/* Start the Concurrent Command Engine. 225/* Start the Concurrent Command Engine.
227 */ 226 */
228static void r128_do_cce_start(drm_r128_private_t * dev_priv) 227static void r128_do_cce_start(drm_r128_private_t *dev_priv)
229{ 228{
230 r128_do_wait_for_idle(dev_priv); 229 r128_do_wait_for_idle(dev_priv);
231 230
@@ -242,7 +241,7 @@ static void r128_do_cce_start(drm_r128_private_t * dev_priv)
242 * commands, so you must wait for the CCE command stream to complete 241 * commands, so you must wait for the CCE command stream to complete
243 * before calling this routine. 242 * before calling this routine.
244 */ 243 */
245static void r128_do_cce_reset(drm_r128_private_t * dev_priv) 244static void r128_do_cce_reset(drm_r128_private_t *dev_priv)
246{ 245{
247 R128_WRITE(R128_PM4_BUFFER_DL_WPTR, 0); 246 R128_WRITE(R128_PM4_BUFFER_DL_WPTR, 0);
248 R128_WRITE(R128_PM4_BUFFER_DL_RPTR, 0); 247 R128_WRITE(R128_PM4_BUFFER_DL_RPTR, 0);
@@ -253,7 +252,7 @@ static void r128_do_cce_reset(drm_r128_private_t * dev_priv)
253 * commands, so you must flush the command stream and wait for the CCE 252 * commands, so you must flush the command stream and wait for the CCE
254 * to go idle before calling this routine. 253 * to go idle before calling this routine.
255 */ 254 */
256static void r128_do_cce_stop(drm_r128_private_t * dev_priv) 255static void r128_do_cce_stop(drm_r128_private_t *dev_priv)
257{ 256{
258 R128_WRITE(R128_PM4_MICRO_CNTL, 0); 257 R128_WRITE(R128_PM4_MICRO_CNTL, 0);
259 R128_WRITE(R128_PM4_BUFFER_CNTL, 258 R128_WRITE(R128_PM4_BUFFER_CNTL,
@@ -264,7 +263,7 @@ static void r128_do_cce_stop(drm_r128_private_t * dev_priv)
264 263
265/* Reset the engine. This will stop the CCE if it is running. 264/* Reset the engine. This will stop the CCE if it is running.
266 */ 265 */
267static int r128_do_engine_reset(struct drm_device * dev) 266static int r128_do_engine_reset(struct drm_device *dev)
268{ 267{
269 drm_r128_private_t *dev_priv = dev->dev_private; 268 drm_r128_private_t *dev_priv = dev->dev_private;
270 u32 clock_cntl_index, mclk_cntl, gen_reset_cntl; 269 u32 clock_cntl_index, mclk_cntl, gen_reset_cntl;
@@ -301,8 +300,8 @@ static int r128_do_engine_reset(struct drm_device * dev)
301 return 0; 300 return 0;
302} 301}
303 302
304static void r128_cce_init_ring_buffer(struct drm_device * dev, 303static void r128_cce_init_ring_buffer(struct drm_device *dev,
305 drm_r128_private_t * dev_priv) 304 drm_r128_private_t *dev_priv)
306{ 305{
307 u32 ring_start; 306 u32 ring_start;
308 u32 tmp; 307 u32 tmp;
@@ -340,7 +339,7 @@ static void r128_cce_init_ring_buffer(struct drm_device * dev,
340 R128_WRITE(R128_BUS_CNTL, tmp); 339 R128_WRITE(R128_BUS_CNTL, tmp);
341} 340}
342 341
343static int r128_do_init_cce(struct drm_device * dev, drm_r128_init_t * init) 342static int r128_do_init_cce(struct drm_device *dev, drm_r128_init_t *init)
344{ 343{
345 drm_r128_private_t *dev_priv; 344 drm_r128_private_t *dev_priv;
346 int rc; 345 int rc;
@@ -588,7 +587,7 @@ static int r128_do_init_cce(struct drm_device * dev, drm_r128_init_t * init)
588 return rc; 587 return rc;
589} 588}
590 589
591int r128_do_cleanup_cce(struct drm_device * dev) 590int r128_do_cleanup_cce(struct drm_device *dev)
592{ 591{
593 592
594 /* Make sure interrupts are disabled here because the uninstall ioctl 593 /* Make sure interrupts are disabled here because the uninstall ioctl
@@ -682,9 +681,8 @@ int r128_cce_stop(struct drm_device *dev, void *data, struct drm_file *file_priv
682 /* Flush any pending CCE commands. This ensures any outstanding 681 /* Flush any pending CCE commands. This ensures any outstanding
683 * commands are exectuted by the engine before we turn it off. 682 * commands are exectuted by the engine before we turn it off.
684 */ 683 */
685 if (stop->flush) { 684 if (stop->flush)
686 r128_do_cce_flush(dev_priv); 685 r128_do_cce_flush(dev_priv);
687 }
688 686
689 /* If we fail to make the engine go idle, we return an error 687 /* If we fail to make the engine go idle, we return an error
690 * code so that the DRM ioctl wrapper can try again. 688 * code so that the DRM ioctl wrapper can try again.
@@ -735,9 +733,8 @@ int r128_cce_idle(struct drm_device *dev, void *data, struct drm_file *file_priv
735 733
736 DEV_INIT_TEST_WITH_RETURN(dev_priv); 734 DEV_INIT_TEST_WITH_RETURN(dev_priv);
737 735
738 if (dev_priv->cce_running) { 736 if (dev_priv->cce_running)
739 r128_do_cce_flush(dev_priv); 737 r128_do_cce_flush(dev_priv);
740 }
741 738
742 return r128_do_cce_idle(dev_priv); 739 return r128_do_cce_idle(dev_priv);
743} 740}
@@ -765,7 +762,7 @@ int r128_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_pr
765#define R128_BUFFER_FREE 0 762#define R128_BUFFER_FREE 0
766 763
767#if 0 764#if 0
768static int r128_freelist_init(struct drm_device * dev) 765static int r128_freelist_init(struct drm_device *dev)
769{ 766{
770 struct drm_device_dma *dma = dev->dma; 767 struct drm_device_dma *dma = dev->dma;
771 drm_r128_private_t *dev_priv = dev->dev_private; 768 drm_r128_private_t *dev_priv = dev->dev_private;
@@ -848,7 +845,7 @@ static struct drm_buf *r128_freelist_get(struct drm_device * dev)
848 return NULL; 845 return NULL;
849} 846}
850 847
851void r128_freelist_reset(struct drm_device * dev) 848void r128_freelist_reset(struct drm_device *dev)
852{ 849{
853 struct drm_device_dma *dma = dev->dma; 850 struct drm_device_dma *dma = dev->dma;
854 int i; 851 int i;
@@ -864,7 +861,7 @@ void r128_freelist_reset(struct drm_device * dev)
864 * CCE command submission 861 * CCE command submission
865 */ 862 */
866 863
867int r128_wait_ring(drm_r128_private_t * dev_priv, int n) 864int r128_wait_ring(drm_r128_private_t *dev_priv, int n)
868{ 865{
869 drm_r128_ring_buffer_t *ring = &dev_priv->ring; 866 drm_r128_ring_buffer_t *ring = &dev_priv->ring;
870 int i; 867 int i;
@@ -881,9 +878,9 @@ int r128_wait_ring(drm_r128_private_t * dev_priv, int n)
881 return -EBUSY; 878 return -EBUSY;
882} 879}
883 880
884static int r128_cce_get_buffers(struct drm_device * dev, 881static int r128_cce_get_buffers(struct drm_device *dev,
885 struct drm_file *file_priv, 882 struct drm_file *file_priv,
886 struct drm_dma * d) 883 struct drm_dma *d)
887{ 884{
888 int i; 885 int i;
889 struct drm_buf *buf; 886 struct drm_buf *buf;
@@ -933,9 +930,8 @@ int r128_cce_buffers(struct drm_device *dev, void *data, struct drm_file *file_p
933 930
934 d->granted_count = 0; 931 d->granted_count = 0;
935 932
936 if (d->request_count) { 933 if (d->request_count)
937 ret = r128_cce_get_buffers(dev, file_priv, d); 934 ret = r128_cce_get_buffers(dev, file_priv, d);
938 }
939 935
940 return ret; 936 return ret;
941} 937}
diff --git a/drivers/gpu/drm/r128/r128_drv.c b/drivers/gpu/drm/r128/r128_drv.c
index b806fdcc7170..1e2971f13aa1 100644
--- a/drivers/gpu/drm/r128/r128_drv.c
+++ b/drivers/gpu/drm/r128/r128_drv.c
@@ -85,7 +85,7 @@ static struct drm_driver driver = {
85 .patchlevel = DRIVER_PATCHLEVEL, 85 .patchlevel = DRIVER_PATCHLEVEL,
86}; 86};
87 87
88int r128_driver_load(struct drm_device * dev, unsigned long flags) 88int r128_driver_load(struct drm_device *dev, unsigned long flags)
89{ 89{
90 return drm_vblank_init(dev, 1); 90 return drm_vblank_init(dev, 1);
91} 91}
diff --git a/drivers/gpu/drm/r128/r128_drv.h b/drivers/gpu/drm/r128/r128_drv.h
index 3c60829d82e9..930c71b2fb5e 100644
--- a/drivers/gpu/drm/r128/r128_drv.h
+++ b/drivers/gpu/drm/r128/r128_drv.h
@@ -53,7 +53,7 @@
53#define DRIVER_MINOR 5 53#define DRIVER_MINOR 5
54#define DRIVER_PATCHLEVEL 0 54#define DRIVER_PATCHLEVEL 0
55 55
56#define GET_RING_HEAD(dev_priv) R128_READ( R128_PM4_BUFFER_DL_RPTR ) 56#define GET_RING_HEAD(dev_priv) R128_READ(R128_PM4_BUFFER_DL_RPTR)
57 57
58typedef struct drm_r128_freelist { 58typedef struct drm_r128_freelist {
59 unsigned int age; 59 unsigned int age;
@@ -144,23 +144,23 @@ extern int r128_engine_reset(struct drm_device *dev, void *data, struct drm_file
144extern int r128_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv); 144extern int r128_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv);
145extern int r128_cce_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv); 145extern int r128_cce_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv);
146 146
147extern void r128_freelist_reset(struct drm_device * dev); 147extern void r128_freelist_reset(struct drm_device *dev);
148 148
149extern int r128_wait_ring(drm_r128_private_t * dev_priv, int n); 149extern int r128_wait_ring(drm_r128_private_t *dev_priv, int n);
150 150
151extern int r128_do_cce_idle(drm_r128_private_t * dev_priv); 151extern int r128_do_cce_idle(drm_r128_private_t *dev_priv);
152extern int r128_do_cleanup_cce(struct drm_device * dev); 152extern int r128_do_cleanup_cce(struct drm_device *dev);
153 153
154extern int r128_enable_vblank(struct drm_device *dev, int crtc); 154extern int r128_enable_vblank(struct drm_device *dev, int crtc);
155extern void r128_disable_vblank(struct drm_device *dev, int crtc); 155extern void r128_disable_vblank(struct drm_device *dev, int crtc);
156extern u32 r128_get_vblank_counter(struct drm_device *dev, int crtc); 156extern u32 r128_get_vblank_counter(struct drm_device *dev, int crtc);
157extern irqreturn_t r128_driver_irq_handler(DRM_IRQ_ARGS); 157extern irqreturn_t r128_driver_irq_handler(DRM_IRQ_ARGS);
158extern void r128_driver_irq_preinstall(struct drm_device * dev); 158extern void r128_driver_irq_preinstall(struct drm_device *dev);
159extern int r128_driver_irq_postinstall(struct drm_device *dev); 159extern int r128_driver_irq_postinstall(struct drm_device *dev);
160extern void r128_driver_irq_uninstall(struct drm_device * dev); 160extern void r128_driver_irq_uninstall(struct drm_device *dev);
161extern void r128_driver_lastclose(struct drm_device * dev); 161extern void r128_driver_lastclose(struct drm_device *dev);
162extern int r128_driver_load(struct drm_device * dev, unsigned long flags); 162extern int r128_driver_load(struct drm_device *dev, unsigned long flags);
163extern void r128_driver_preclose(struct drm_device * dev, 163extern void r128_driver_preclose(struct drm_device *dev,
164 struct drm_file *file_priv); 164 struct drm_file *file_priv);
165 165
166extern long r128_compat_ioctl(struct file *filp, unsigned int cmd, 166extern long r128_compat_ioctl(struct file *filp, unsigned int cmd,
@@ -390,27 +390,27 @@ extern long r128_compat_ioctl(struct file *filp, unsigned int cmd,
390 390
391#define R128_PCIGART_TABLE_SIZE 32768 391#define R128_PCIGART_TABLE_SIZE 32768
392 392
393#define R128_READ(reg) DRM_READ32( dev_priv->mmio, (reg) ) 393#define R128_READ(reg) DRM_READ32(dev_priv->mmio, (reg))
394#define R128_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) ) 394#define R128_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val))
395#define R128_READ8(reg) DRM_READ8( dev_priv->mmio, (reg) ) 395#define R128_READ8(reg) DRM_READ8(dev_priv->mmio, (reg))
396#define R128_WRITE8(reg,val) DRM_WRITE8( dev_priv->mmio, (reg), (val) ) 396#define R128_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val))
397 397
398#define R128_WRITE_PLL(addr,val) \ 398#define R128_WRITE_PLL(addr, val) \
399do { \ 399do { \
400 R128_WRITE8(R128_CLOCK_CNTL_INDEX, \ 400 R128_WRITE8(R128_CLOCK_CNTL_INDEX, \
401 ((addr) & 0x1f) | R128_PLL_WR_EN); \ 401 ((addr) & 0x1f) | R128_PLL_WR_EN); \
402 R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \ 402 R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \
403} while (0) 403} while (0)
404 404
405#define CCE_PACKET0( reg, n ) (R128_CCE_PACKET0 | \ 405#define CCE_PACKET0(reg, n) (R128_CCE_PACKET0 | \
406 ((n) << 16) | ((reg) >> 2)) 406 ((n) << 16) | ((reg) >> 2))
407#define CCE_PACKET1( reg0, reg1 ) (R128_CCE_PACKET1 | \ 407#define CCE_PACKET1(reg0, reg1) (R128_CCE_PACKET1 | \
408 (((reg1) >> 2) << 11) | ((reg0) >> 2)) 408 (((reg1) >> 2) << 11) | ((reg0) >> 2))
409#define CCE_PACKET2() (R128_CCE_PACKET2) 409#define CCE_PACKET2() (R128_CCE_PACKET2)
410#define CCE_PACKET3( pkt, n ) (R128_CCE_PACKET3 | \ 410#define CCE_PACKET3(pkt, n) (R128_CCE_PACKET3 | \
411 (pkt) | ((n) << 16)) 411 (pkt) | ((n) << 16))
412 412
413static __inline__ void r128_update_ring_snapshot(drm_r128_private_t * dev_priv) 413static __inline__ void r128_update_ring_snapshot(drm_r128_private_t *dev_priv)
414{ 414{
415 drm_r128_ring_buffer_t *ring = &dev_priv->ring; 415 drm_r128_ring_buffer_t *ring = &dev_priv->ring;
416 ring->space = (GET_RING_HEAD(dev_priv) - ring->tail) * sizeof(u32); 416 ring->space = (GET_RING_HEAD(dev_priv) - ring->tail) * sizeof(u32);
@@ -430,37 +430,38 @@ do { \
430 } \ 430 } \
431} while (0) 431} while (0)
432 432
433#define RING_SPACE_TEST_WITH_RETURN( dev_priv ) \ 433#define RING_SPACE_TEST_WITH_RETURN(dev_priv) \
434do { \ 434do { \
435 drm_r128_ring_buffer_t *ring = &dev_priv->ring; int i; \ 435 drm_r128_ring_buffer_t *ring = &dev_priv->ring; int i; \
436 if ( ring->space < ring->high_mark ) { \ 436 if (ring->space < ring->high_mark) { \
437 for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { \ 437 for (i = 0 ; i < dev_priv->usec_timeout ; i++) { \
438 r128_update_ring_snapshot( dev_priv ); \ 438 r128_update_ring_snapshot(dev_priv); \
439 if ( ring->space >= ring->high_mark ) \ 439 if (ring->space >= ring->high_mark) \
440 goto __ring_space_done; \ 440 goto __ring_space_done; \
441 DRM_UDELAY(1); \ 441 DRM_UDELAY(1); \
442 } \ 442 } \
443 DRM_ERROR( "ring space check failed!\n" ); \ 443 DRM_ERROR("ring space check failed!\n"); \
444 return -EBUSY; \ 444 return -EBUSY; \
445 } \ 445 } \
446 __ring_space_done: \ 446 __ring_space_done: \
447 ; \ 447 ; \
448} while (0) 448} while (0)
449 449
450#define VB_AGE_TEST_WITH_RETURN( dev_priv ) \ 450#define VB_AGE_TEST_WITH_RETURN(dev_priv) \
451do { \ 451do { \
452 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; \ 452 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; \
453 if ( sarea_priv->last_dispatch >= R128_MAX_VB_AGE ) { \ 453 if (sarea_priv->last_dispatch >= R128_MAX_VB_AGE) { \
454 int __ret = r128_do_cce_idle( dev_priv ); \ 454 int __ret = r128_do_cce_idle(dev_priv); \
455 if ( __ret ) return __ret; \ 455 if (__ret) \
456 return __ret; \
456 sarea_priv->last_dispatch = 0; \ 457 sarea_priv->last_dispatch = 0; \
457 r128_freelist_reset( dev ); \ 458 r128_freelist_reset(dev); \
458 } \ 459 } \
459} while (0) 460} while (0)
460 461
461#define R128_WAIT_UNTIL_PAGE_FLIPPED() do { \ 462#define R128_WAIT_UNTIL_PAGE_FLIPPED() do { \
462 OUT_RING( CCE_PACKET0( R128_WAIT_UNTIL, 0 ) ); \ 463 OUT_RING(CCE_PACKET0(R128_WAIT_UNTIL, 0)); \
463 OUT_RING( R128_EVENT_CRTC_OFFSET ); \ 464 OUT_RING(R128_EVENT_CRTC_OFFSET); \
464} while (0) 465} while (0)
465 466
466/* ================================================================ 467/* ================================================================
@@ -472,13 +473,12 @@ do { \
472#define RING_LOCALS \ 473#define RING_LOCALS \
473 int write, _nr; unsigned int tail_mask; volatile u32 *ring; 474 int write, _nr; unsigned int tail_mask; volatile u32 *ring;
474 475
475#define BEGIN_RING( n ) do { \ 476#define BEGIN_RING(n) do { \
476 if ( R128_VERBOSE ) { \ 477 if (R128_VERBOSE) \
477 DRM_INFO( "BEGIN_RING( %d )\n", (n)); \ 478 DRM_INFO("BEGIN_RING(%d)\n", (n)); \
478 } \ 479 if (dev_priv->ring.space <= (n) * sizeof(u32)) { \
479 if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \
480 COMMIT_RING(); \ 480 COMMIT_RING(); \
481 r128_wait_ring( dev_priv, (n) * sizeof(u32) ); \ 481 r128_wait_ring(dev_priv, (n) * sizeof(u32)); \
482 } \ 482 } \
483 _nr = n; dev_priv->ring.space -= (n) * sizeof(u32); \ 483 _nr = n; dev_priv->ring.space -= (n) * sizeof(u32); \
484 ring = dev_priv->ring.start; \ 484 ring = dev_priv->ring.start; \
@@ -494,40 +494,36 @@ do { \
494#define R128_BROKEN_CCE 1 494#define R128_BROKEN_CCE 1
495 495
496#define ADVANCE_RING() do { \ 496#define ADVANCE_RING() do { \
497 if ( R128_VERBOSE ) { \ 497 if (R128_VERBOSE) \
498 DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \ 498 DRM_INFO("ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \
499 write, dev_priv->ring.tail ); \ 499 write, dev_priv->ring.tail); \
500 } \ 500 if (R128_BROKEN_CCE && write < 32) \
501 if ( R128_BROKEN_CCE && write < 32 ) { \ 501 memcpy(dev_priv->ring.end, \
502 memcpy( dev_priv->ring.end, \ 502 dev_priv->ring.start, \
503 dev_priv->ring.start, \ 503 write * sizeof(u32)); \
504 write * sizeof(u32) ); \ 504 if (((dev_priv->ring.tail + _nr) & tail_mask) != write) \
505 } \
506 if (((dev_priv->ring.tail + _nr) & tail_mask) != write) { \
507 DRM_ERROR( \ 505 DRM_ERROR( \
508 "ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n", \ 506 "ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n", \
509 ((dev_priv->ring.tail + _nr) & tail_mask), \ 507 ((dev_priv->ring.tail + _nr) & tail_mask), \
510 write, __LINE__); \ 508 write, __LINE__); \
511 } else \ 509 else \
512 dev_priv->ring.tail = write; \ 510 dev_priv->ring.tail = write; \
513} while (0) 511} while (0)
514 512
515#define COMMIT_RING() do { \ 513#define COMMIT_RING() do { \
516 if ( R128_VERBOSE ) { \ 514 if (R128_VERBOSE) \
517 DRM_INFO( "COMMIT_RING() tail=0x%06x\n", \ 515 DRM_INFO("COMMIT_RING() tail=0x%06x\n", \
518 dev_priv->ring.tail ); \ 516 dev_priv->ring.tail); \
519 } \
520 DRM_MEMORYBARRIER(); \ 517 DRM_MEMORYBARRIER(); \
521 R128_WRITE( R128_PM4_BUFFER_DL_WPTR, dev_priv->ring.tail ); \ 518 R128_WRITE(R128_PM4_BUFFER_DL_WPTR, dev_priv->ring.tail); \
522 R128_READ( R128_PM4_BUFFER_DL_WPTR ); \ 519 R128_READ(R128_PM4_BUFFER_DL_WPTR); \
523} while (0) 520} while (0)
524 521
525#define OUT_RING( x ) do { \ 522#define OUT_RING(x) do { \
526 if ( R128_VERBOSE ) { \ 523 if (R128_VERBOSE) \
527 DRM_INFO( " OUT_RING( 0x%08x ) at 0x%x\n", \ 524 DRM_INFO(" OUT_RING( 0x%08x ) at 0x%x\n", \
528 (unsigned int)(x), write ); \ 525 (unsigned int)(x), write); \
529 } \ 526 ring[write++] = cpu_to_le32(x); \
530 ring[write++] = cpu_to_le32( x ); \
531 write &= tail_mask; \ 527 write &= tail_mask; \
532} while (0) 528} while (0)
533 529
diff --git a/drivers/gpu/drm/r128/r128_irq.c b/drivers/gpu/drm/r128/r128_irq.c
index 69810fb8ac49..429d5a02695f 100644
--- a/drivers/gpu/drm/r128/r128_irq.c
+++ b/drivers/gpu/drm/r128/r128_irq.c
@@ -90,7 +90,7 @@ void r128_disable_vblank(struct drm_device *dev, int crtc)
90 */ 90 */
91} 91}
92 92
93void r128_driver_irq_preinstall(struct drm_device * dev) 93void r128_driver_irq_preinstall(struct drm_device *dev)
94{ 94{
95 drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private; 95 drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private;
96 96
@@ -105,7 +105,7 @@ int r128_driver_irq_postinstall(struct drm_device *dev)
105 return 0; 105 return 0;
106} 106}
107 107
108void r128_driver_irq_uninstall(struct drm_device * dev) 108void r128_driver_irq_uninstall(struct drm_device *dev)
109{ 109{
110 drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private; 110 drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private;
111 if (!dev_priv) 111 if (!dev_priv)
diff --git a/drivers/gpu/drm/r128/r128_state.c b/drivers/gpu/drm/r128/r128_state.c
index af2665cf4718..077af1f2f9b4 100644
--- a/drivers/gpu/drm/r128/r128_state.c
+++ b/drivers/gpu/drm/r128/r128_state.c
@@ -37,8 +37,8 @@
37 * CCE hardware state programming functions 37 * CCE hardware state programming functions
38 */ 38 */
39 39
40static void r128_emit_clip_rects(drm_r128_private_t * dev_priv, 40static void r128_emit_clip_rects(drm_r128_private_t *dev_priv,
41 struct drm_clip_rect * boxes, int count) 41 struct drm_clip_rect *boxes, int count)
42{ 42{
43 u32 aux_sc_cntl = 0x00000000; 43 u32 aux_sc_cntl = 0x00000000;
44 RING_LOCALS; 44 RING_LOCALS;
@@ -80,7 +80,7 @@ static void r128_emit_clip_rects(drm_r128_private_t * dev_priv,
80 ADVANCE_RING(); 80 ADVANCE_RING();
81} 81}
82 82
83static __inline__ void r128_emit_core(drm_r128_private_t * dev_priv) 83static __inline__ void r128_emit_core(drm_r128_private_t *dev_priv)
84{ 84{
85 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 85 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
86 drm_r128_context_regs_t *ctx = &sarea_priv->context_state; 86 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
@@ -95,7 +95,7 @@ static __inline__ void r128_emit_core(drm_r128_private_t * dev_priv)
95 ADVANCE_RING(); 95 ADVANCE_RING();
96} 96}
97 97
98static __inline__ void r128_emit_context(drm_r128_private_t * dev_priv) 98static __inline__ void r128_emit_context(drm_r128_private_t *dev_priv)
99{ 99{
100 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 100 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
101 drm_r128_context_regs_t *ctx = &sarea_priv->context_state; 101 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
@@ -121,7 +121,7 @@ static __inline__ void r128_emit_context(drm_r128_private_t * dev_priv)
121 ADVANCE_RING(); 121 ADVANCE_RING();
122} 122}
123 123
124static __inline__ void r128_emit_setup(drm_r128_private_t * dev_priv) 124static __inline__ void r128_emit_setup(drm_r128_private_t *dev_priv)
125{ 125{
126 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 126 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
127 drm_r128_context_regs_t *ctx = &sarea_priv->context_state; 127 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
@@ -137,7 +137,7 @@ static __inline__ void r128_emit_setup(drm_r128_private_t * dev_priv)
137 ADVANCE_RING(); 137 ADVANCE_RING();
138} 138}
139 139
140static __inline__ void r128_emit_masks(drm_r128_private_t * dev_priv) 140static __inline__ void r128_emit_masks(drm_r128_private_t *dev_priv)
141{ 141{
142 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 142 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
143 drm_r128_context_regs_t *ctx = &sarea_priv->context_state; 143 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
@@ -156,7 +156,7 @@ static __inline__ void r128_emit_masks(drm_r128_private_t * dev_priv)
156 ADVANCE_RING(); 156 ADVANCE_RING();
157} 157}
158 158
159static __inline__ void r128_emit_window(drm_r128_private_t * dev_priv) 159static __inline__ void r128_emit_window(drm_r128_private_t *dev_priv)
160{ 160{
161 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 161 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
162 drm_r128_context_regs_t *ctx = &sarea_priv->context_state; 162 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
@@ -171,7 +171,7 @@ static __inline__ void r128_emit_window(drm_r128_private_t * dev_priv)
171 ADVANCE_RING(); 171 ADVANCE_RING();
172} 172}
173 173
174static __inline__ void r128_emit_tex0(drm_r128_private_t * dev_priv) 174static __inline__ void r128_emit_tex0(drm_r128_private_t *dev_priv)
175{ 175{
176 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 176 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
177 drm_r128_context_regs_t *ctx = &sarea_priv->context_state; 177 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
@@ -187,9 +187,8 @@ static __inline__ void r128_emit_tex0(drm_r128_private_t * dev_priv)
187 OUT_RING(tex->tex_cntl); 187 OUT_RING(tex->tex_cntl);
188 OUT_RING(tex->tex_combine_cntl); 188 OUT_RING(tex->tex_combine_cntl);
189 OUT_RING(ctx->tex_size_pitch_c); 189 OUT_RING(ctx->tex_size_pitch_c);
190 for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++) { 190 for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++)
191 OUT_RING(tex->tex_offset[i]); 191 OUT_RING(tex->tex_offset[i]);
192 }
193 192
194 OUT_RING(CCE_PACKET0(R128_CONSTANT_COLOR_C, 1)); 193 OUT_RING(CCE_PACKET0(R128_CONSTANT_COLOR_C, 1));
195 OUT_RING(ctx->constant_color_c); 194 OUT_RING(ctx->constant_color_c);
@@ -198,7 +197,7 @@ static __inline__ void r128_emit_tex0(drm_r128_private_t * dev_priv)
198 ADVANCE_RING(); 197 ADVANCE_RING();
199} 198}
200 199
201static __inline__ void r128_emit_tex1(drm_r128_private_t * dev_priv) 200static __inline__ void r128_emit_tex1(drm_r128_private_t *dev_priv)
202{ 201{
203 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 202 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
204 drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[1]; 203 drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[1];
@@ -211,9 +210,8 @@ static __inline__ void r128_emit_tex1(drm_r128_private_t * dev_priv)
211 OUT_RING(CCE_PACKET0(R128_SEC_TEX_CNTL_C, 1 + R128_MAX_TEXTURE_LEVELS)); 210 OUT_RING(CCE_PACKET0(R128_SEC_TEX_CNTL_C, 1 + R128_MAX_TEXTURE_LEVELS));
212 OUT_RING(tex->tex_cntl); 211 OUT_RING(tex->tex_cntl);
213 OUT_RING(tex->tex_combine_cntl); 212 OUT_RING(tex->tex_combine_cntl);
214 for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++) { 213 for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++)
215 OUT_RING(tex->tex_offset[i]); 214 OUT_RING(tex->tex_offset[i]);
216 }
217 215
218 OUT_RING(CCE_PACKET0(R128_SEC_TEXTURE_BORDER_COLOR_C, 0)); 216 OUT_RING(CCE_PACKET0(R128_SEC_TEXTURE_BORDER_COLOR_C, 0));
219 OUT_RING(tex->tex_border_color); 217 OUT_RING(tex->tex_border_color);
@@ -221,7 +219,7 @@ static __inline__ void r128_emit_tex1(drm_r128_private_t * dev_priv)
221 ADVANCE_RING(); 219 ADVANCE_RING();
222} 220}
223 221
224static void r128_emit_state(drm_r128_private_t * dev_priv) 222static void r128_emit_state(drm_r128_private_t *dev_priv)
225{ 223{
226 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 224 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
227 unsigned int dirty = sarea_priv->dirty; 225 unsigned int dirty = sarea_priv->dirty;
@@ -274,7 +272,7 @@ static void r128_emit_state(drm_r128_private_t * dev_priv)
274 * Performance monitoring functions 272 * Performance monitoring functions
275 */ 273 */
276 274
277static void r128_clear_box(drm_r128_private_t * dev_priv, 275static void r128_clear_box(drm_r128_private_t *dev_priv,
278 int x, int y, int w, int h, int r, int g, int b) 276 int x, int y, int w, int h, int r, int g, int b)
279{ 277{
280 u32 pitch, offset; 278 u32 pitch, offset;
@@ -321,13 +319,12 @@ static void r128_clear_box(drm_r128_private_t * dev_priv,
321 ADVANCE_RING(); 319 ADVANCE_RING();
322} 320}
323 321
324static void r128_cce_performance_boxes(drm_r128_private_t * dev_priv) 322static void r128_cce_performance_boxes(drm_r128_private_t *dev_priv)
325{ 323{
326 if (atomic_read(&dev_priv->idle_count) == 0) { 324 if (atomic_read(&dev_priv->idle_count) == 0)
327 r128_clear_box(dev_priv, 64, 4, 8, 8, 0, 255, 0); 325 r128_clear_box(dev_priv, 64, 4, 8, 8, 0, 255, 0);
328 } else { 326 else
329 atomic_set(&dev_priv->idle_count, 0); 327 atomic_set(&dev_priv->idle_count, 0);
330 }
331} 328}
332 329
333#endif 330#endif
@@ -352,8 +349,8 @@ static void r128_print_dirty(const char *msg, unsigned int flags)
352 (flags & R128_REQUIRE_QUIESCENCE) ? "quiescence, " : ""); 349 (flags & R128_REQUIRE_QUIESCENCE) ? "quiescence, " : "");
353} 350}
354 351
355static void r128_cce_dispatch_clear(struct drm_device * dev, 352static void r128_cce_dispatch_clear(struct drm_device *dev,
356 drm_r128_clear_t * clear) 353 drm_r128_clear_t *clear)
357{ 354{
358 drm_r128_private_t *dev_priv = dev->dev_private; 355 drm_r128_private_t *dev_priv = dev->dev_private;
359 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 356 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -458,7 +455,7 @@ static void r128_cce_dispatch_clear(struct drm_device * dev,
458 } 455 }
459} 456}
460 457
461static void r128_cce_dispatch_swap(struct drm_device * dev) 458static void r128_cce_dispatch_swap(struct drm_device *dev)
462{ 459{
463 drm_r128_private_t *dev_priv = dev->dev_private; 460 drm_r128_private_t *dev_priv = dev->dev_private;
464 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 461 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -524,7 +521,7 @@ static void r128_cce_dispatch_swap(struct drm_device * dev)
524 ADVANCE_RING(); 521 ADVANCE_RING();
525} 522}
526 523
527static void r128_cce_dispatch_flip(struct drm_device * dev) 524static void r128_cce_dispatch_flip(struct drm_device *dev)
528{ 525{
529 drm_r128_private_t *dev_priv = dev->dev_private; 526 drm_r128_private_t *dev_priv = dev->dev_private;
530 RING_LOCALS; 527 RING_LOCALS;
@@ -542,11 +539,10 @@ static void r128_cce_dispatch_flip(struct drm_device * dev)
542 R128_WAIT_UNTIL_PAGE_FLIPPED(); 539 R128_WAIT_UNTIL_PAGE_FLIPPED();
543 OUT_RING(CCE_PACKET0(R128_CRTC_OFFSET, 0)); 540 OUT_RING(CCE_PACKET0(R128_CRTC_OFFSET, 0));
544 541
545 if (dev_priv->current_page == 0) { 542 if (dev_priv->current_page == 0)
546 OUT_RING(dev_priv->back_offset); 543 OUT_RING(dev_priv->back_offset);
547 } else { 544 else
548 OUT_RING(dev_priv->front_offset); 545 OUT_RING(dev_priv->front_offset);
549 }
550 546
551 ADVANCE_RING(); 547 ADVANCE_RING();
552 548
@@ -566,7 +562,7 @@ static void r128_cce_dispatch_flip(struct drm_device * dev)
566 ADVANCE_RING(); 562 ADVANCE_RING();
567} 563}
568 564
569static void r128_cce_dispatch_vertex(struct drm_device * dev, struct drm_buf * buf) 565static void r128_cce_dispatch_vertex(struct drm_device *dev, struct drm_buf *buf)
570{ 566{
571 drm_r128_private_t *dev_priv = dev->dev_private; 567 drm_r128_private_t *dev_priv = dev->dev_private;
572 drm_r128_buf_priv_t *buf_priv = buf->dev_private; 568 drm_r128_buf_priv_t *buf_priv = buf->dev_private;
@@ -585,9 +581,8 @@ static void r128_cce_dispatch_vertex(struct drm_device * dev, struct drm_buf * b
585 if (buf->used) { 581 if (buf->used) {
586 buf_priv->dispatched = 1; 582 buf_priv->dispatched = 1;
587 583
588 if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS) { 584 if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS)
589 r128_emit_state(dev_priv); 585 r128_emit_state(dev_priv);
590 }
591 586
592 do { 587 do {
593 /* Emit the next set of up to three cliprects */ 588 /* Emit the next set of up to three cliprects */
@@ -636,8 +631,8 @@ static void r128_cce_dispatch_vertex(struct drm_device * dev, struct drm_buf * b
636 sarea_priv->nbox = 0; 631 sarea_priv->nbox = 0;
637} 632}
638 633
639static void r128_cce_dispatch_indirect(struct drm_device * dev, 634static void r128_cce_dispatch_indirect(struct drm_device *dev,
640 struct drm_buf * buf, int start, int end) 635 struct drm_buf *buf, int start, int end)
641{ 636{
642 drm_r128_private_t *dev_priv = dev->dev_private; 637 drm_r128_private_t *dev_priv = dev->dev_private;
643 drm_r128_buf_priv_t *buf_priv = buf->dev_private; 638 drm_r128_buf_priv_t *buf_priv = buf->dev_private;
@@ -691,8 +686,8 @@ static void r128_cce_dispatch_indirect(struct drm_device * dev,
691 dev_priv->sarea_priv->last_dispatch++; 686 dev_priv->sarea_priv->last_dispatch++;
692} 687}
693 688
694static void r128_cce_dispatch_indices(struct drm_device * dev, 689static void r128_cce_dispatch_indices(struct drm_device *dev,
695 struct drm_buf * buf, 690 struct drm_buf *buf,
696 int start, int end, int count) 691 int start, int end, int count)
697{ 692{
698 drm_r128_private_t *dev_priv = dev->dev_private; 693 drm_r128_private_t *dev_priv = dev->dev_private;
@@ -713,9 +708,8 @@ static void r128_cce_dispatch_indices(struct drm_device * dev,
713 if (start != end) { 708 if (start != end) {
714 buf_priv->dispatched = 1; 709 buf_priv->dispatched = 1;
715 710
716 if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS) { 711 if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS)
717 r128_emit_state(dev_priv); 712 r128_emit_state(dev_priv);
718 }
719 713
720 dwords = (end - start + 3) / sizeof(u32); 714 dwords = (end - start + 3) / sizeof(u32);
721 715
@@ -775,9 +769,9 @@ static void r128_cce_dispatch_indices(struct drm_device * dev,
775 sarea_priv->nbox = 0; 769 sarea_priv->nbox = 0;
776} 770}
777 771
778static int r128_cce_dispatch_blit(struct drm_device * dev, 772static int r128_cce_dispatch_blit(struct drm_device *dev,
779 struct drm_file *file_priv, 773 struct drm_file *file_priv,
780 drm_r128_blit_t * blit) 774 drm_r128_blit_t *blit)
781{ 775{
782 drm_r128_private_t *dev_priv = dev->dev_private; 776 drm_r128_private_t *dev_priv = dev->dev_private;
783 struct drm_device_dma *dma = dev->dma; 777 struct drm_device_dma *dma = dev->dma;
@@ -887,8 +881,8 @@ static int r128_cce_dispatch_blit(struct drm_device * dev,
887 * have hardware stencil support. 881 * have hardware stencil support.
888 */ 882 */
889 883
890static int r128_cce_dispatch_write_span(struct drm_device * dev, 884static int r128_cce_dispatch_write_span(struct drm_device *dev,
891 drm_r128_depth_t * depth) 885 drm_r128_depth_t *depth)
892{ 886{
893 drm_r128_private_t *dev_priv = dev->dev_private; 887 drm_r128_private_t *dev_priv = dev->dev_private;
894 int count, x, y; 888 int count, x, y;
@@ -902,12 +896,10 @@ static int r128_cce_dispatch_write_span(struct drm_device * dev,
902 if (count > 4096 || count <= 0) 896 if (count > 4096 || count <= 0)
903 return -EMSGSIZE; 897 return -EMSGSIZE;
904 898
905 if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x))) { 899 if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x)))
906 return -EFAULT; 900 return -EFAULT;
907 } 901 if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y)))
908 if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y))) {
909 return -EFAULT; 902 return -EFAULT;
910 }
911 903
912 buffer_size = depth->n * sizeof(u32); 904 buffer_size = depth->n * sizeof(u32);
913 buffer = kmalloc(buffer_size, GFP_KERNEL); 905 buffer = kmalloc(buffer_size, GFP_KERNEL);
@@ -983,8 +975,8 @@ static int r128_cce_dispatch_write_span(struct drm_device * dev,
983 return 0; 975 return 0;
984} 976}
985 977
986static int r128_cce_dispatch_write_pixels(struct drm_device * dev, 978static int r128_cce_dispatch_write_pixels(struct drm_device *dev,
987 drm_r128_depth_t * depth) 979 drm_r128_depth_t *depth)
988{ 980{
989 drm_r128_private_t *dev_priv = dev->dev_private; 981 drm_r128_private_t *dev_priv = dev->dev_private;
990 int count, *x, *y; 982 int count, *x, *y;
@@ -1001,9 +993,8 @@ static int r128_cce_dispatch_write_pixels(struct drm_device * dev,
1001 xbuf_size = count * sizeof(*x); 993 xbuf_size = count * sizeof(*x);
1002 ybuf_size = count * sizeof(*y); 994 ybuf_size = count * sizeof(*y);
1003 x = kmalloc(xbuf_size, GFP_KERNEL); 995 x = kmalloc(xbuf_size, GFP_KERNEL);
1004 if (x == NULL) { 996 if (x == NULL)
1005 return -ENOMEM; 997 return -ENOMEM;
1006 }
1007 y = kmalloc(ybuf_size, GFP_KERNEL); 998 y = kmalloc(ybuf_size, GFP_KERNEL);
1008 if (y == NULL) { 999 if (y == NULL) {
1009 kfree(x); 1000 kfree(x);
@@ -1105,8 +1096,8 @@ static int r128_cce_dispatch_write_pixels(struct drm_device * dev,
1105 return 0; 1096 return 0;
1106} 1097}
1107 1098
1108static int r128_cce_dispatch_read_span(struct drm_device * dev, 1099static int r128_cce_dispatch_read_span(struct drm_device *dev,
1109 drm_r128_depth_t * depth) 1100 drm_r128_depth_t *depth)
1110{ 1101{
1111 drm_r128_private_t *dev_priv = dev->dev_private; 1102 drm_r128_private_t *dev_priv = dev->dev_private;
1112 int count, x, y; 1103 int count, x, y;
@@ -1117,12 +1108,10 @@ static int r128_cce_dispatch_read_span(struct drm_device * dev,
1117 if (count > 4096 || count <= 0) 1108 if (count > 4096 || count <= 0)
1118 return -EMSGSIZE; 1109 return -EMSGSIZE;
1119 1110
1120 if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x))) { 1111 if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x)))
1121 return -EFAULT; 1112 return -EFAULT;
1122 } 1113 if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y)))
1123 if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y))) {
1124 return -EFAULT; 1114 return -EFAULT;
1125 }
1126 1115
1127 BEGIN_RING(7); 1116 BEGIN_RING(7);
1128 1117
@@ -1148,8 +1137,8 @@ static int r128_cce_dispatch_read_span(struct drm_device * dev,
1148 return 0; 1137 return 0;
1149} 1138}
1150 1139
1151static int r128_cce_dispatch_read_pixels(struct drm_device * dev, 1140static int r128_cce_dispatch_read_pixels(struct drm_device *dev,
1152 drm_r128_depth_t * depth) 1141 drm_r128_depth_t *depth)
1153{ 1142{
1154 drm_r128_private_t *dev_priv = dev->dev_private; 1143 drm_r128_private_t *dev_priv = dev->dev_private;
1155 int count, *x, *y; 1144 int count, *x, *y;
@@ -1161,16 +1150,14 @@ static int r128_cce_dispatch_read_pixels(struct drm_device * dev,
1161 if (count > 4096 || count <= 0) 1150 if (count > 4096 || count <= 0)
1162 return -EMSGSIZE; 1151 return -EMSGSIZE;
1163 1152
1164 if (count > dev_priv->depth_pitch) { 1153 if (count > dev_priv->depth_pitch)
1165 count = dev_priv->depth_pitch; 1154 count = dev_priv->depth_pitch;
1166 }
1167 1155
1168 xbuf_size = count * sizeof(*x); 1156 xbuf_size = count * sizeof(*x);
1169 ybuf_size = count * sizeof(*y); 1157 ybuf_size = count * sizeof(*y);
1170 x = kmalloc(xbuf_size, GFP_KERNEL); 1158 x = kmalloc(xbuf_size, GFP_KERNEL);
1171 if (x == NULL) { 1159 if (x == NULL)
1172 return -ENOMEM; 1160 return -ENOMEM;
1173 }
1174 y = kmalloc(ybuf_size, GFP_KERNEL); 1161 y = kmalloc(ybuf_size, GFP_KERNEL);
1175 if (y == NULL) { 1162 if (y == NULL) {
1176 kfree(x); 1163 kfree(x);
@@ -1220,7 +1207,7 @@ static int r128_cce_dispatch_read_pixels(struct drm_device * dev,
1220 * Polygon stipple 1207 * Polygon stipple
1221 */ 1208 */
1222 1209
1223static void r128_cce_dispatch_stipple(struct drm_device * dev, u32 * stipple) 1210static void r128_cce_dispatch_stipple(struct drm_device *dev, u32 *stipple)
1224{ 1211{
1225 drm_r128_private_t *dev_priv = dev->dev_private; 1212 drm_r128_private_t *dev_priv = dev->dev_private;
1226 int i; 1213 int i;
@@ -1230,9 +1217,8 @@ static void r128_cce_dispatch_stipple(struct drm_device * dev, u32 * stipple)
1230 BEGIN_RING(33); 1217 BEGIN_RING(33);
1231 1218
1232 OUT_RING(CCE_PACKET0(R128_BRUSH_DATA0, 31)); 1219 OUT_RING(CCE_PACKET0(R128_BRUSH_DATA0, 31));
1233 for (i = 0; i < 32; i++) { 1220 for (i = 0; i < 32; i++)
1234 OUT_RING(stipple[i]); 1221 OUT_RING(stipple[i]);
1235 }
1236 1222
1237 ADVANCE_RING(); 1223 ADVANCE_RING();
1238} 1224}
@@ -1269,7 +1255,7 @@ static int r128_cce_clear(struct drm_device *dev, void *data, struct drm_file *f
1269 return 0; 1255 return 0;
1270} 1256}
1271 1257
1272static int r128_do_init_pageflip(struct drm_device * dev) 1258static int r128_do_init_pageflip(struct drm_device *dev)
1273{ 1259{
1274 drm_r128_private_t *dev_priv = dev->dev_private; 1260 drm_r128_private_t *dev_priv = dev->dev_private;
1275 DRM_DEBUG("\n"); 1261 DRM_DEBUG("\n");
@@ -1288,7 +1274,7 @@ static int r128_do_init_pageflip(struct drm_device * dev)
1288 return 0; 1274 return 0;
1289} 1275}
1290 1276
1291static int r128_do_cleanup_pageflip(struct drm_device * dev) 1277static int r128_do_cleanup_pageflip(struct drm_device *dev)
1292{ 1278{
1293 drm_r128_private_t *dev_priv = dev->dev_private; 1279 drm_r128_private_t *dev_priv = dev->dev_private;
1294 DRM_DEBUG("\n"); 1280 DRM_DEBUG("\n");
@@ -1645,17 +1631,16 @@ static int r128_getparam(struct drm_device *dev, void *data, struct drm_file *fi
1645 return 0; 1631 return 0;
1646} 1632}
1647 1633
1648void r128_driver_preclose(struct drm_device * dev, struct drm_file *file_priv) 1634void r128_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
1649{ 1635{
1650 if (dev->dev_private) { 1636 if (dev->dev_private) {
1651 drm_r128_private_t *dev_priv = dev->dev_private; 1637 drm_r128_private_t *dev_priv = dev->dev_private;
1652 if (dev_priv->page_flipping) { 1638 if (dev_priv->page_flipping)
1653 r128_do_cleanup_pageflip(dev); 1639 r128_do_cleanup_pageflip(dev);
1654 }
1655 } 1640 }
1656} 1641}
1657 1642
1658void r128_driver_lastclose(struct drm_device * dev) 1643void r128_driver_lastclose(struct drm_device *dev)
1659{ 1644{
1660 r128_do_cleanup_cce(dev); 1645 r128_do_cleanup_cce(dev);
1661} 1646}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-12 02:48:52 -0500