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path: root/drivers/gpu/drm/r128/r128_drv.h
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Diffstat (limited to 'drivers/gpu/drm/r128/r128_drv.h')
-rw-r--r--drivers/gpu/drm/r128/r128_drv.h122
1 files changed, 59 insertions, 63 deletions
diff --git a/drivers/gpu/drm/r128/r128_drv.h b/drivers/gpu/drm/r128/r128_drv.h
index 3c60829d82e9..930c71b2fb5e 100644
--- a/drivers/gpu/drm/r128/r128_drv.h
+++ b/drivers/gpu/drm/r128/r128_drv.h
@@ -53,7 +53,7 @@
53#define DRIVER_MINOR 5 53#define DRIVER_MINOR 5
54#define DRIVER_PATCHLEVEL 0 54#define DRIVER_PATCHLEVEL 0
55 55
56#define GET_RING_HEAD(dev_priv) R128_READ( R128_PM4_BUFFER_DL_RPTR ) 56#define GET_RING_HEAD(dev_priv) R128_READ(R128_PM4_BUFFER_DL_RPTR)
57 57
58typedef struct drm_r128_freelist { 58typedef struct drm_r128_freelist {
59 unsigned int age; 59 unsigned int age;
@@ -144,23 +144,23 @@ extern int r128_engine_reset(struct drm_device *dev, void *data, struct drm_file
144extern int r128_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv); 144extern int r128_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv);
145extern int r128_cce_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv); 145extern int r128_cce_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv);
146 146
147extern void r128_freelist_reset(struct drm_device * dev); 147extern void r128_freelist_reset(struct drm_device *dev);
148 148
149extern int r128_wait_ring(drm_r128_private_t * dev_priv, int n); 149extern int r128_wait_ring(drm_r128_private_t *dev_priv, int n);
150 150
151extern int r128_do_cce_idle(drm_r128_private_t * dev_priv); 151extern int r128_do_cce_idle(drm_r128_private_t *dev_priv);
152extern int r128_do_cleanup_cce(struct drm_device * dev); 152extern int r128_do_cleanup_cce(struct drm_device *dev);
153 153
154extern int r128_enable_vblank(struct drm_device *dev, int crtc); 154extern int r128_enable_vblank(struct drm_device *dev, int crtc);
155extern void r128_disable_vblank(struct drm_device *dev, int crtc); 155extern void r128_disable_vblank(struct drm_device *dev, int crtc);
156extern u32 r128_get_vblank_counter(struct drm_device *dev, int crtc); 156extern u32 r128_get_vblank_counter(struct drm_device *dev, int crtc);
157extern irqreturn_t r128_driver_irq_handler(DRM_IRQ_ARGS); 157extern irqreturn_t r128_driver_irq_handler(DRM_IRQ_ARGS);
158extern void r128_driver_irq_preinstall(struct drm_device * dev); 158extern void r128_driver_irq_preinstall(struct drm_device *dev);
159extern int r128_driver_irq_postinstall(struct drm_device *dev); 159extern int r128_driver_irq_postinstall(struct drm_device *dev);
160extern void r128_driver_irq_uninstall(struct drm_device * dev); 160extern void r128_driver_irq_uninstall(struct drm_device *dev);
161extern void r128_driver_lastclose(struct drm_device * dev); 161extern void r128_driver_lastclose(struct drm_device *dev);
162extern int r128_driver_load(struct drm_device * dev, unsigned long flags); 162extern int r128_driver_load(struct drm_device *dev, unsigned long flags);
163extern void r128_driver_preclose(struct drm_device * dev, 163extern void r128_driver_preclose(struct drm_device *dev,
164 struct drm_file *file_priv); 164 struct drm_file *file_priv);
165 165
166extern long r128_compat_ioctl(struct file *filp, unsigned int cmd, 166extern long r128_compat_ioctl(struct file *filp, unsigned int cmd,
@@ -390,27 +390,27 @@ extern long r128_compat_ioctl(struct file *filp, unsigned int cmd,
390 390
391#define R128_PCIGART_TABLE_SIZE 32768 391#define R128_PCIGART_TABLE_SIZE 32768
392 392
393#define R128_READ(reg) DRM_READ32( dev_priv->mmio, (reg) ) 393#define R128_READ(reg) DRM_READ32(dev_priv->mmio, (reg))
394#define R128_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) ) 394#define R128_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val))
395#define R128_READ8(reg) DRM_READ8( dev_priv->mmio, (reg) ) 395#define R128_READ8(reg) DRM_READ8(dev_priv->mmio, (reg))
396#define R128_WRITE8(reg,val) DRM_WRITE8( dev_priv->mmio, (reg), (val) ) 396#define R128_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val))
397 397
398#define R128_WRITE_PLL(addr,val) \ 398#define R128_WRITE_PLL(addr, val) \
399do { \ 399do { \
400 R128_WRITE8(R128_CLOCK_CNTL_INDEX, \ 400 R128_WRITE8(R128_CLOCK_CNTL_INDEX, \
401 ((addr) & 0x1f) | R128_PLL_WR_EN); \ 401 ((addr) & 0x1f) | R128_PLL_WR_EN); \
402 R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \ 402 R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \
403} while (0) 403} while (0)
404 404
405#define CCE_PACKET0( reg, n ) (R128_CCE_PACKET0 | \ 405#define CCE_PACKET0(reg, n) (R128_CCE_PACKET0 | \
406 ((n) << 16) | ((reg) >> 2)) 406 ((n) << 16) | ((reg) >> 2))
407#define CCE_PACKET1( reg0, reg1 ) (R128_CCE_PACKET1 | \ 407#define CCE_PACKET1(reg0, reg1) (R128_CCE_PACKET1 | \
408 (((reg1) >> 2) << 11) | ((reg0) >> 2)) 408 (((reg1) >> 2) << 11) | ((reg0) >> 2))
409#define CCE_PACKET2() (R128_CCE_PACKET2) 409#define CCE_PACKET2() (R128_CCE_PACKET2)
410#define CCE_PACKET3( pkt, n ) (R128_CCE_PACKET3 | \ 410#define CCE_PACKET3(pkt, n) (R128_CCE_PACKET3 | \
411 (pkt) | ((n) << 16)) 411 (pkt) | ((n) << 16))
412 412
413static __inline__ void r128_update_ring_snapshot(drm_r128_private_t * dev_priv) 413static __inline__ void r128_update_ring_snapshot(drm_r128_private_t *dev_priv)
414{ 414{
415 drm_r128_ring_buffer_t *ring = &dev_priv->ring; 415 drm_r128_ring_buffer_t *ring = &dev_priv->ring;
416 ring->space = (GET_RING_HEAD(dev_priv) - ring->tail) * sizeof(u32); 416 ring->space = (GET_RING_HEAD(dev_priv) - ring->tail) * sizeof(u32);
@@ -430,37 +430,38 @@ do { \
430 } \ 430 } \
431} while (0) 431} while (0)
432 432
433#define RING_SPACE_TEST_WITH_RETURN( dev_priv ) \ 433#define RING_SPACE_TEST_WITH_RETURN(dev_priv) \
434do { \ 434do { \
435 drm_r128_ring_buffer_t *ring = &dev_priv->ring; int i; \ 435 drm_r128_ring_buffer_t *ring = &dev_priv->ring; int i; \
436 if ( ring->space < ring->high_mark ) { \ 436 if (ring->space < ring->high_mark) { \
437 for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { \ 437 for (i = 0 ; i < dev_priv->usec_timeout ; i++) { \
438 r128_update_ring_snapshot( dev_priv ); \ 438 r128_update_ring_snapshot(dev_priv); \
439 if ( ring->space >= ring->high_mark ) \ 439 if (ring->space >= ring->high_mark) \
440 goto __ring_space_done; \ 440 goto __ring_space_done; \
441 DRM_UDELAY(1); \ 441 DRM_UDELAY(1); \
442 } \ 442 } \
443 DRM_ERROR( "ring space check failed!\n" ); \ 443 DRM_ERROR("ring space check failed!\n"); \
444 return -EBUSY; \ 444 return -EBUSY; \
445 } \ 445 } \
446 __ring_space_done: \ 446 __ring_space_done: \
447 ; \ 447 ; \
448} while (0) 448} while (0)
449 449
450#define VB_AGE_TEST_WITH_RETURN( dev_priv ) \ 450#define VB_AGE_TEST_WITH_RETURN(dev_priv) \
451do { \ 451do { \
452 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; \ 452 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; \
453 if ( sarea_priv->last_dispatch >= R128_MAX_VB_AGE ) { \ 453 if (sarea_priv->last_dispatch >= R128_MAX_VB_AGE) { \
454 int __ret = r128_do_cce_idle( dev_priv ); \ 454 int __ret = r128_do_cce_idle(dev_priv); \
455 if ( __ret ) return __ret; \ 455 if (__ret) \
456 return __ret; \
456 sarea_priv->last_dispatch = 0; \ 457 sarea_priv->last_dispatch = 0; \
457 r128_freelist_reset( dev ); \ 458 r128_freelist_reset(dev); \
458 } \ 459 } \
459} while (0) 460} while (0)
460 461
461#define R128_WAIT_UNTIL_PAGE_FLIPPED() do { \ 462#define R128_WAIT_UNTIL_PAGE_FLIPPED() do { \
462 OUT_RING( CCE_PACKET0( R128_WAIT_UNTIL, 0 ) ); \ 463 OUT_RING(CCE_PACKET0(R128_WAIT_UNTIL, 0)); \
463 OUT_RING( R128_EVENT_CRTC_OFFSET ); \ 464 OUT_RING(R128_EVENT_CRTC_OFFSET); \
464} while (0) 465} while (0)
465 466
466/* ================================================================ 467/* ================================================================
@@ -472,13 +473,12 @@ do { \
472#define RING_LOCALS \ 473#define RING_LOCALS \
473 int write, _nr; unsigned int tail_mask; volatile u32 *ring; 474 int write, _nr; unsigned int tail_mask; volatile u32 *ring;
474 475
475#define BEGIN_RING( n ) do { \ 476#define BEGIN_RING(n) do { \
476 if ( R128_VERBOSE ) { \ 477 if (R128_VERBOSE) \
477 DRM_INFO( "BEGIN_RING( %d )\n", (n)); \ 478 DRM_INFO("BEGIN_RING(%d)\n", (n)); \
478 } \ 479 if (dev_priv->ring.space <= (n) * sizeof(u32)) { \
479 if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \
480 COMMIT_RING(); \ 480 COMMIT_RING(); \
481 r128_wait_ring( dev_priv, (n) * sizeof(u32) ); \ 481 r128_wait_ring(dev_priv, (n) * sizeof(u32)); \
482 } \ 482 } \
483 _nr = n; dev_priv->ring.space -= (n) * sizeof(u32); \ 483 _nr = n; dev_priv->ring.space -= (n) * sizeof(u32); \
484 ring = dev_priv->ring.start; \ 484 ring = dev_priv->ring.start; \
@@ -494,40 +494,36 @@ do { \
494#define R128_BROKEN_CCE 1 494#define R128_BROKEN_CCE 1
495 495
496#define ADVANCE_RING() do { \ 496#define ADVANCE_RING() do { \
497 if ( R128_VERBOSE ) { \ 497 if (R128_VERBOSE) \
498 DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \ 498 DRM_INFO("ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \
499 write, dev_priv->ring.tail ); \ 499 write, dev_priv->ring.tail); \
500 } \ 500 if (R128_BROKEN_CCE && write < 32) \
501 if ( R128_BROKEN_CCE && write < 32 ) { \ 501 memcpy(dev_priv->ring.end, \
502 memcpy( dev_priv->ring.end, \ 502 dev_priv->ring.start, \
503 dev_priv->ring.start, \ 503 write * sizeof(u32)); \
504 write * sizeof(u32) ); \ 504 if (((dev_priv->ring.tail + _nr) & tail_mask) != write) \
505 } \
506 if (((dev_priv->ring.tail + _nr) & tail_mask) != write) { \
507 DRM_ERROR( \ 505 DRM_ERROR( \
508 "ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n", \ 506 "ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n", \
509 ((dev_priv->ring.tail + _nr) & tail_mask), \ 507 ((dev_priv->ring.tail + _nr) & tail_mask), \
510 write, __LINE__); \ 508 write, __LINE__); \
511 } else \ 509 else \
512 dev_priv->ring.tail = write; \ 510 dev_priv->ring.tail = write; \
513} while (0) 511} while (0)
514 512
515#define COMMIT_RING() do { \ 513#define COMMIT_RING() do { \
516 if ( R128_VERBOSE ) { \ 514 if (R128_VERBOSE) \
517 DRM_INFO( "COMMIT_RING() tail=0x%06x\n", \ 515 DRM_INFO("COMMIT_RING() tail=0x%06x\n", \
518 dev_priv->ring.tail ); \ 516 dev_priv->ring.tail); \
519 } \
520 DRM_MEMORYBARRIER(); \ 517 DRM_MEMORYBARRIER(); \
521 R128_WRITE( R128_PM4_BUFFER_DL_WPTR, dev_priv->ring.tail ); \ 518 R128_WRITE(R128_PM4_BUFFER_DL_WPTR, dev_priv->ring.tail); \
522 R128_READ( R128_PM4_BUFFER_DL_WPTR ); \ 519 R128_READ(R128_PM4_BUFFER_DL_WPTR); \
523} while (0) 520} while (0)
524 521
525#define OUT_RING( x ) do { \ 522#define OUT_RING(x) do { \
526 if ( R128_VERBOSE ) { \ 523 if (R128_VERBOSE) \
527 DRM_INFO( " OUT_RING( 0x%08x ) at 0x%x\n", \ 524 DRM_INFO(" OUT_RING( 0x%08x ) at 0x%x\n", \
528 (unsigned int)(x), write ); \ 525 (unsigned int)(x), write); \
529 } \ 526 ring[write++] = cpu_to_le32(x); \
530 ring[write++] = cpu_to_le32( x ); \
531 write &= tail_mask; \ 527 write &= tail_mask; \
532} while (0) 528} while (0)
533 529
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-22 19:17:57 -0500