diff options
Diffstat (limited to 'drivers/gpu/drm/r128/r128_cce.c')
-rw-r--r-- | drivers/gpu/drm/r128/r128_cce.c | 52 |
1 files changed, 24 insertions, 28 deletions
diff --git a/drivers/gpu/drm/r128/r128_cce.c b/drivers/gpu/drm/r128/r128_cce.c index e671d0e74d4c..570e190710bd 100644 --- a/drivers/gpu/drm/r128/r128_cce.c +++ b/drivers/gpu/drm/r128/r128_cce.c | |||
@@ -44,7 +44,7 @@ | |||
44 | 44 | ||
45 | MODULE_FIRMWARE(FIRMWARE_NAME); | 45 | MODULE_FIRMWARE(FIRMWARE_NAME); |
46 | 46 | ||
47 | static int R128_READ_PLL(struct drm_device * dev, int addr) | 47 | static int R128_READ_PLL(struct drm_device *dev, int addr) |
48 | { | 48 | { |
49 | drm_r128_private_t *dev_priv = dev->dev_private; | 49 | drm_r128_private_t *dev_priv = dev->dev_private; |
50 | 50 | ||
@@ -53,7 +53,7 @@ static int R128_READ_PLL(struct drm_device * dev, int addr) | |||
53 | } | 53 | } |
54 | 54 | ||
55 | #if R128_FIFO_DEBUG | 55 | #if R128_FIFO_DEBUG |
56 | static void r128_status(drm_r128_private_t * dev_priv) | 56 | static void r128_status(drm_r128_private_t *dev_priv) |
57 | { | 57 | { |
58 | printk("GUI_STAT = 0x%08x\n", | 58 | printk("GUI_STAT = 0x%08x\n", |
59 | (unsigned int)R128_READ(R128_GUI_STAT)); | 59 | (unsigned int)R128_READ(R128_GUI_STAT)); |
@@ -74,7 +74,7 @@ static void r128_status(drm_r128_private_t * dev_priv) | |||
74 | * Engine, FIFO control | 74 | * Engine, FIFO control |
75 | */ | 75 | */ |
76 | 76 | ||
77 | static int r128_do_pixcache_flush(drm_r128_private_t * dev_priv) | 77 | static int r128_do_pixcache_flush(drm_r128_private_t *dev_priv) |
78 | { | 78 | { |
79 | u32 tmp; | 79 | u32 tmp; |
80 | int i; | 80 | int i; |
@@ -83,9 +83,8 @@ static int r128_do_pixcache_flush(drm_r128_private_t * dev_priv) | |||
83 | R128_WRITE(R128_PC_NGUI_CTLSTAT, tmp); | 83 | R128_WRITE(R128_PC_NGUI_CTLSTAT, tmp); |
84 | 84 | ||
85 | for (i = 0; i < dev_priv->usec_timeout; i++) { | 85 | for (i = 0; i < dev_priv->usec_timeout; i++) { |
86 | if (!(R128_READ(R128_PC_NGUI_CTLSTAT) & R128_PC_BUSY)) { | 86 | if (!(R128_READ(R128_PC_NGUI_CTLSTAT) & R128_PC_BUSY)) |
87 | return 0; | 87 | return 0; |
88 | } | ||
89 | DRM_UDELAY(1); | 88 | DRM_UDELAY(1); |
90 | } | 89 | } |
91 | 90 | ||
@@ -95,7 +94,7 @@ static int r128_do_pixcache_flush(drm_r128_private_t * dev_priv) | |||
95 | return -EBUSY; | 94 | return -EBUSY; |
96 | } | 95 | } |
97 | 96 | ||
98 | static int r128_do_wait_for_fifo(drm_r128_private_t * dev_priv, int entries) | 97 | static int r128_do_wait_for_fifo(drm_r128_private_t *dev_priv, int entries) |
99 | { | 98 | { |
100 | int i; | 99 | int i; |
101 | 100 | ||
@@ -112,7 +111,7 @@ static int r128_do_wait_for_fifo(drm_r128_private_t * dev_priv, int entries) | |||
112 | return -EBUSY; | 111 | return -EBUSY; |
113 | } | 112 | } |
114 | 113 | ||
115 | static int r128_do_wait_for_idle(drm_r128_private_t * dev_priv) | 114 | static int r128_do_wait_for_idle(drm_r128_private_t *dev_priv) |
116 | { | 115 | { |
117 | int i, ret; | 116 | int i, ret; |
118 | 117 | ||
@@ -189,7 +188,7 @@ out_release: | |||
189 | * prior to a wait for idle, as it informs the engine that the command | 188 | * prior to a wait for idle, as it informs the engine that the command |
190 | * stream is ending. | 189 | * stream is ending. |
191 | */ | 190 | */ |
192 | static void r128_do_cce_flush(drm_r128_private_t * dev_priv) | 191 | static void r128_do_cce_flush(drm_r128_private_t *dev_priv) |
193 | { | 192 | { |
194 | u32 tmp; | 193 | u32 tmp; |
195 | 194 | ||
@@ -199,7 +198,7 @@ static void r128_do_cce_flush(drm_r128_private_t * dev_priv) | |||
199 | 198 | ||
200 | /* Wait for the CCE to go idle. | 199 | /* Wait for the CCE to go idle. |
201 | */ | 200 | */ |
202 | int r128_do_cce_idle(drm_r128_private_t * dev_priv) | 201 | int r128_do_cce_idle(drm_r128_private_t *dev_priv) |
203 | { | 202 | { |
204 | int i; | 203 | int i; |
205 | 204 | ||
@@ -225,7 +224,7 @@ int r128_do_cce_idle(drm_r128_private_t * dev_priv) | |||
225 | 224 | ||
226 | /* Start the Concurrent Command Engine. | 225 | /* Start the Concurrent Command Engine. |
227 | */ | 226 | */ |
228 | static void r128_do_cce_start(drm_r128_private_t * dev_priv) | 227 | static void r128_do_cce_start(drm_r128_private_t *dev_priv) |
229 | { | 228 | { |
230 | r128_do_wait_for_idle(dev_priv); | 229 | r128_do_wait_for_idle(dev_priv); |
231 | 230 | ||
@@ -242,7 +241,7 @@ static void r128_do_cce_start(drm_r128_private_t * dev_priv) | |||
242 | * commands, so you must wait for the CCE command stream to complete | 241 | * commands, so you must wait for the CCE command stream to complete |
243 | * before calling this routine. | 242 | * before calling this routine. |
244 | */ | 243 | */ |
245 | static void r128_do_cce_reset(drm_r128_private_t * dev_priv) | 244 | static void r128_do_cce_reset(drm_r128_private_t *dev_priv) |
246 | { | 245 | { |
247 | R128_WRITE(R128_PM4_BUFFER_DL_WPTR, 0); | 246 | R128_WRITE(R128_PM4_BUFFER_DL_WPTR, 0); |
248 | R128_WRITE(R128_PM4_BUFFER_DL_RPTR, 0); | 247 | R128_WRITE(R128_PM4_BUFFER_DL_RPTR, 0); |
@@ -253,7 +252,7 @@ static void r128_do_cce_reset(drm_r128_private_t * dev_priv) | |||
253 | * commands, so you must flush the command stream and wait for the CCE | 252 | * commands, so you must flush the command stream and wait for the CCE |
254 | * to go idle before calling this routine. | 253 | * to go idle before calling this routine. |
255 | */ | 254 | */ |
256 | static void r128_do_cce_stop(drm_r128_private_t * dev_priv) | 255 | static void r128_do_cce_stop(drm_r128_private_t *dev_priv) |
257 | { | 256 | { |
258 | R128_WRITE(R128_PM4_MICRO_CNTL, 0); | 257 | R128_WRITE(R128_PM4_MICRO_CNTL, 0); |
259 | R128_WRITE(R128_PM4_BUFFER_CNTL, | 258 | R128_WRITE(R128_PM4_BUFFER_CNTL, |
@@ -264,7 +263,7 @@ static void r128_do_cce_stop(drm_r128_private_t * dev_priv) | |||
264 | 263 | ||
265 | /* Reset the engine. This will stop the CCE if it is running. | 264 | /* Reset the engine. This will stop the CCE if it is running. |
266 | */ | 265 | */ |
267 | static int r128_do_engine_reset(struct drm_device * dev) | 266 | static int r128_do_engine_reset(struct drm_device *dev) |
268 | { | 267 | { |
269 | drm_r128_private_t *dev_priv = dev->dev_private; | 268 | drm_r128_private_t *dev_priv = dev->dev_private; |
270 | u32 clock_cntl_index, mclk_cntl, gen_reset_cntl; | 269 | u32 clock_cntl_index, mclk_cntl, gen_reset_cntl; |
@@ -301,8 +300,8 @@ static int r128_do_engine_reset(struct drm_device * dev) | |||
301 | return 0; | 300 | return 0; |
302 | } | 301 | } |
303 | 302 | ||
304 | static void r128_cce_init_ring_buffer(struct drm_device * dev, | 303 | static void r128_cce_init_ring_buffer(struct drm_device *dev, |
305 | drm_r128_private_t * dev_priv) | 304 | drm_r128_private_t *dev_priv) |
306 | { | 305 | { |
307 | u32 ring_start; | 306 | u32 ring_start; |
308 | u32 tmp; | 307 | u32 tmp; |
@@ -340,7 +339,7 @@ static void r128_cce_init_ring_buffer(struct drm_device * dev, | |||
340 | R128_WRITE(R128_BUS_CNTL, tmp); | 339 | R128_WRITE(R128_BUS_CNTL, tmp); |
341 | } | 340 | } |
342 | 341 | ||
343 | static int r128_do_init_cce(struct drm_device * dev, drm_r128_init_t * init) | 342 | static int r128_do_init_cce(struct drm_device *dev, drm_r128_init_t *init) |
344 | { | 343 | { |
345 | drm_r128_private_t *dev_priv; | 344 | drm_r128_private_t *dev_priv; |
346 | int rc; | 345 | int rc; |
@@ -588,7 +587,7 @@ static int r128_do_init_cce(struct drm_device * dev, drm_r128_init_t * init) | |||
588 | return rc; | 587 | return rc; |
589 | } | 588 | } |
590 | 589 | ||
591 | int r128_do_cleanup_cce(struct drm_device * dev) | 590 | int r128_do_cleanup_cce(struct drm_device *dev) |
592 | { | 591 | { |
593 | 592 | ||
594 | /* Make sure interrupts are disabled here because the uninstall ioctl | 593 | /* Make sure interrupts are disabled here because the uninstall ioctl |
@@ -682,9 +681,8 @@ int r128_cce_stop(struct drm_device *dev, void *data, struct drm_file *file_priv | |||
682 | /* Flush any pending CCE commands. This ensures any outstanding | 681 | /* Flush any pending CCE commands. This ensures any outstanding |
683 | * commands are exectuted by the engine before we turn it off. | 682 | * commands are exectuted by the engine before we turn it off. |
684 | */ | 683 | */ |
685 | if (stop->flush) { | 684 | if (stop->flush) |
686 | r128_do_cce_flush(dev_priv); | 685 | r128_do_cce_flush(dev_priv); |
687 | } | ||
688 | 686 | ||
689 | /* If we fail to make the engine go idle, we return an error | 687 | /* If we fail to make the engine go idle, we return an error |
690 | * code so that the DRM ioctl wrapper can try again. | 688 | * code so that the DRM ioctl wrapper can try again. |
@@ -735,9 +733,8 @@ int r128_cce_idle(struct drm_device *dev, void *data, struct drm_file *file_priv | |||
735 | 733 | ||
736 | DEV_INIT_TEST_WITH_RETURN(dev_priv); | 734 | DEV_INIT_TEST_WITH_RETURN(dev_priv); |
737 | 735 | ||
738 | if (dev_priv->cce_running) { | 736 | if (dev_priv->cce_running) |
739 | r128_do_cce_flush(dev_priv); | 737 | r128_do_cce_flush(dev_priv); |
740 | } | ||
741 | 738 | ||
742 | return r128_do_cce_idle(dev_priv); | 739 | return r128_do_cce_idle(dev_priv); |
743 | } | 740 | } |
@@ -765,7 +762,7 @@ int r128_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_pr | |||
765 | #define R128_BUFFER_FREE 0 | 762 | #define R128_BUFFER_FREE 0 |
766 | 763 | ||
767 | #if 0 | 764 | #if 0 |
768 | static int r128_freelist_init(struct drm_device * dev) | 765 | static int r128_freelist_init(struct drm_device *dev) |
769 | { | 766 | { |
770 | struct drm_device_dma *dma = dev->dma; | 767 | struct drm_device_dma *dma = dev->dma; |
771 | drm_r128_private_t *dev_priv = dev->dev_private; | 768 | drm_r128_private_t *dev_priv = dev->dev_private; |
@@ -848,7 +845,7 @@ static struct drm_buf *r128_freelist_get(struct drm_device * dev) | |||
848 | return NULL; | 845 | return NULL; |
849 | } | 846 | } |
850 | 847 | ||
851 | void r128_freelist_reset(struct drm_device * dev) | 848 | void r128_freelist_reset(struct drm_device *dev) |
852 | { | 849 | { |
853 | struct drm_device_dma *dma = dev->dma; | 850 | struct drm_device_dma *dma = dev->dma; |
854 | int i; | 851 | int i; |
@@ -864,7 +861,7 @@ void r128_freelist_reset(struct drm_device * dev) | |||
864 | * CCE command submission | 861 | * CCE command submission |
865 | */ | 862 | */ |
866 | 863 | ||
867 | int r128_wait_ring(drm_r128_private_t * dev_priv, int n) | 864 | int r128_wait_ring(drm_r128_private_t *dev_priv, int n) |
868 | { | 865 | { |
869 | drm_r128_ring_buffer_t *ring = &dev_priv->ring; | 866 | drm_r128_ring_buffer_t *ring = &dev_priv->ring; |
870 | int i; | 867 | int i; |
@@ -881,9 +878,9 @@ int r128_wait_ring(drm_r128_private_t * dev_priv, int n) | |||
881 | return -EBUSY; | 878 | return -EBUSY; |
882 | } | 879 | } |
883 | 880 | ||
884 | static int r128_cce_get_buffers(struct drm_device * dev, | 881 | static int r128_cce_get_buffers(struct drm_device *dev, |
885 | struct drm_file *file_priv, | 882 | struct drm_file *file_priv, |
886 | struct drm_dma * d) | 883 | struct drm_dma *d) |
887 | { | 884 | { |
888 | int i; | 885 | int i; |
889 | struct drm_buf *buf; | 886 | struct drm_buf *buf; |
@@ -933,9 +930,8 @@ int r128_cce_buffers(struct drm_device *dev, void *data, struct drm_file *file_p | |||
933 | 930 | ||
934 | d->granted_count = 0; | 931 | d->granted_count = 0; |
935 | 932 | ||
936 | if (d->request_count) { | 933 | if (d->request_count) |
937 | ret = r128_cce_get_buffers(dev, file_priv, d); | 934 | ret = r128_cce_get_buffers(dev, file_priv, d); |
938 | } | ||
939 | 935 | ||
940 | return ret; | 936 | return ret; |
941 | } | 937 | } |