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Diffstat (limited to 'drivers/gpu/drm/nouveau')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_bios.c15
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.c8
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.h3
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_pm.c2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_temp.c2
-rw-r--r--drivers/gpu/drm/nouveau/nv50_evo.c3
-rw-r--r--drivers/gpu/drm/nouveau/nv50_graph.c3
-rw-r--r--drivers/gpu/drm/nouveau/nv50_vm.c5
-rw-r--r--drivers/gpu/drm/nouveau/nvc0_graph.c23
-rw-r--r--drivers/gpu/drm/nouveau/nvc0_grctx.c2
10 files changed, 47 insertions, 19 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c
index 2aef5cd3acf5..49e5e99917e2 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bios.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bios.c
@@ -6310,6 +6310,9 @@ void merge_like_dcb_entries(struct drm_device *dev, struct dcb_table *dcb)
6310static bool 6310static bool
6311apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf) 6311apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf)
6312{ 6312{
6313 struct drm_nouveau_private *dev_priv = dev->dev_private;
6314 struct dcb_table *dcb = &dev_priv->vbios.dcb;
6315
6313 /* Dell Precision M6300 6316 /* Dell Precision M6300
6314 * DCB entry 2: 02025312 00000010 6317 * DCB entry 2: 02025312 00000010
6315 * DCB entry 3: 02026312 00000020 6318 * DCB entry 3: 02026312 00000020
@@ -6327,6 +6330,18 @@ apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf)
6327 return false; 6330 return false;
6328 } 6331 }
6329 6332
6333 /* GeForce3 Ti 200
6334 *
6335 * DCB reports an LVDS output that should be TMDS:
6336 * DCB entry 1: f2005014 ffffffff
6337 */
6338 if (nv_match_device(dev, 0x0201, 0x1462, 0x8851)) {
6339 if (*conn == 0xf2005014 && *conf == 0xffffffff) {
6340 fabricate_dcb_output(dcb, OUTPUT_TMDS, 1, 1, 1);
6341 return false;
6342 }
6343 }
6344
6330 return true; 6345 return true;
6331} 6346}
6332 6347
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.c b/drivers/gpu/drm/nouveau/nouveau_drv.c
index 13bb672a16f4..f658a04eecf9 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.c
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.c
@@ -234,9 +234,9 @@ nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
234 pci_set_power_state(pdev, PCI_D3hot); 234 pci_set_power_state(pdev, PCI_D3hot);
235 } 235 }
236 236
237 acquire_console_sem(); 237 console_lock();
238 nouveau_fbcon_set_suspend(dev, 1); 238 nouveau_fbcon_set_suspend(dev, 1);
239 release_console_sem(); 239 console_unlock();
240 nouveau_fbcon_restore_accel(dev); 240 nouveau_fbcon_restore_accel(dev);
241 return 0; 241 return 0;
242 242
@@ -359,9 +359,9 @@ nouveau_pci_resume(struct pci_dev *pdev)
359 nv_crtc->lut.depth = 0; 359 nv_crtc->lut.depth = 0;
360 } 360 }
361 361
362 acquire_console_sem(); 362 console_lock();
363 nouveau_fbcon_set_suspend(dev, 0); 363 nouveau_fbcon_set_suspend(dev, 0);
364 release_console_sem(); 364 console_unlock();
365 365
366 nouveau_fbcon_zfill_all(dev); 366 nouveau_fbcon_zfill_all(dev);
367 367
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 01bffc4412d2..9821fcacc3d2 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -848,9 +848,6 @@ extern void nv10_mem_put_tile_region(struct drm_device *dev,
848 struct nouveau_fence *fence); 848 struct nouveau_fence *fence);
849extern const struct ttm_mem_type_manager_func nouveau_vram_manager; 849extern const struct ttm_mem_type_manager_func nouveau_vram_manager;
850 850
851/* nvc0_vram.c */
852extern const struct ttm_mem_type_manager_func nvc0_vram_manager;
853
854/* nouveau_notifier.c */ 851/* nouveau_notifier.c */
855extern int nouveau_notifier_init_channel(struct nouveau_channel *); 852extern int nouveau_notifier_init_channel(struct nouveau_channel *);
856extern void nouveau_notifier_takedown_channel(struct nouveau_channel *); 853extern void nouveau_notifier_takedown_channel(struct nouveau_channel *);
diff --git a/drivers/gpu/drm/nouveau/nouveau_pm.c b/drivers/gpu/drm/nouveau/nouveau_pm.c
index fb846a3fef15..f05c0cddfeca 100644
--- a/drivers/gpu/drm/nouveau/nouveau_pm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_pm.c
@@ -443,7 +443,7 @@ nouveau_hwmon_fini(struct drm_device *dev)
443 struct nouveau_pm_engine *pm = &dev_priv->engine.pm; 443 struct nouveau_pm_engine *pm = &dev_priv->engine.pm;
444 444
445 if (pm->hwmon) { 445 if (pm->hwmon) {
446 sysfs_remove_group(&pm->hwmon->kobj, &hwmon_attrgroup); 446 sysfs_remove_group(&dev->pdev->dev.kobj, &hwmon_attrgroup);
447 hwmon_device_unregister(pm->hwmon); 447 hwmon_device_unregister(pm->hwmon);
448 } 448 }
449#endif 449#endif
diff --git a/drivers/gpu/drm/nouveau/nouveau_temp.c b/drivers/gpu/drm/nouveau/nouveau_temp.c
index 7ecc4adc1e45..8d9968e1cba8 100644
--- a/drivers/gpu/drm/nouveau/nouveau_temp.c
+++ b/drivers/gpu/drm/nouveau/nouveau_temp.c
@@ -265,8 +265,8 @@ nouveau_temp_probe_i2c(struct drm_device *dev)
265 struct i2c_board_info info[] = { 265 struct i2c_board_info info[] = {
266 { I2C_BOARD_INFO("w83l785ts", 0x2d) }, 266 { I2C_BOARD_INFO("w83l785ts", 0x2d) },
267 { I2C_BOARD_INFO("w83781d", 0x2d) }, 267 { I2C_BOARD_INFO("w83781d", 0x2d) },
268 { I2C_BOARD_INFO("f75375", 0x2e) },
269 { I2C_BOARD_INFO("adt7473", 0x2e) }, 268 { I2C_BOARD_INFO("adt7473", 0x2e) },
269 { I2C_BOARD_INFO("f75375", 0x2e) },
270 { I2C_BOARD_INFO("lm99", 0x4c) }, 270 { I2C_BOARD_INFO("lm99", 0x4c) },
271 { } 271 { }
272 }; 272 };
diff --git a/drivers/gpu/drm/nouveau/nv50_evo.c b/drivers/gpu/drm/nouveau/nv50_evo.c
index 14e24e906ee8..0ea090f4244a 100644
--- a/drivers/gpu/drm/nouveau/nv50_evo.c
+++ b/drivers/gpu/drm/nouveau/nv50_evo.c
@@ -283,8 +283,7 @@ nv50_evo_create(struct drm_device *dev)
283 nv50_evo_channel_del(&dev_priv->evo); 283 nv50_evo_channel_del(&dev_priv->evo);
284 return ret; 284 return ret;
285 } 285 }
286 } else 286 } else {
287 if (dev_priv->chipset != 0x50) {
288 ret = nv50_evo_dmaobj_new(evo, 0x3d, NvEvoFB16, 0x70, 0x19, 287 ret = nv50_evo_dmaobj_new(evo, 0x3d, NvEvoFB16, 0x70, 0x19,
289 0, 0xffffffff, 0x00010000); 288 0, 0xffffffff, 0x00010000);
290 if (ret) { 289 if (ret) {
diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c
index 2d7ea75a09d4..37e21d2be95b 100644
--- a/drivers/gpu/drm/nouveau/nv50_graph.c
+++ b/drivers/gpu/drm/nouveau/nv50_graph.c
@@ -256,6 +256,7 @@ nv50_graph_destroy_context(struct nouveau_channel *chan)
256 struct drm_device *dev = chan->dev; 256 struct drm_device *dev = chan->dev;
257 struct drm_nouveau_private *dev_priv = dev->dev_private; 257 struct drm_nouveau_private *dev_priv = dev->dev_private;
258 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph; 258 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
259 struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
259 int i, hdr = (dev_priv->chipset == 0x50) ? 0x200 : 0x20; 260 int i, hdr = (dev_priv->chipset == 0x50) ? 0x200 : 0x20;
260 unsigned long flags; 261 unsigned long flags;
261 262
@@ -265,6 +266,7 @@ nv50_graph_destroy_context(struct nouveau_channel *chan)
265 return; 266 return;
266 267
267 spin_lock_irqsave(&dev_priv->context_switch_lock, flags); 268 spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
269 pfifo->reassign(dev, false);
268 pgraph->fifo_access(dev, false); 270 pgraph->fifo_access(dev, false);
269 271
270 if (pgraph->channel(dev) == chan) 272 if (pgraph->channel(dev) == chan)
@@ -275,6 +277,7 @@ nv50_graph_destroy_context(struct nouveau_channel *chan)
275 dev_priv->engine.instmem.flush(dev); 277 dev_priv->engine.instmem.flush(dev);
276 278
277 pgraph->fifo_access(dev, true); 279 pgraph->fifo_access(dev, true);
280 pfifo->reassign(dev, true);
278 spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags); 281 spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
279 282
280 nouveau_gpuobj_ref(NULL, &chan->ramin_grctx); 283 nouveau_gpuobj_ref(NULL, &chan->ramin_grctx);
diff --git a/drivers/gpu/drm/nouveau/nv50_vm.c b/drivers/gpu/drm/nouveau/nv50_vm.c
index 38e523e10995..459ff08241e5 100644
--- a/drivers/gpu/drm/nouveau/nv50_vm.c
+++ b/drivers/gpu/drm/nouveau/nv50_vm.c
@@ -45,11 +45,6 @@ nv50_vm_map_pgt(struct nouveau_gpuobj *pgd, u32 pde,
45 } 45 }
46 46
47 if (phys & 1) { 47 if (phys & 1) {
48 if (dev_priv->vram_sys_base) {
49 phys += dev_priv->vram_sys_base;
50 phys |= 0x30;
51 }
52
53 if (coverage <= 32 * 1024 * 1024) 48 if (coverage <= 32 * 1024 * 1024)
54 phys |= 0x60; 49 phys |= 0x60;
55 else if (coverage <= 64 * 1024 * 1024) 50 else if (coverage <= 64 * 1024 * 1024)
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.c b/drivers/gpu/drm/nouveau/nvc0_graph.c
index e6ea7d83187f..eb18a7e89f5b 100644
--- a/drivers/gpu/drm/nouveau/nvc0_graph.c
+++ b/drivers/gpu/drm/nouveau/nvc0_graph.c
@@ -31,6 +31,7 @@
31#include "nvc0_graph.h" 31#include "nvc0_graph.h"
32 32
33static void nvc0_graph_isr(struct drm_device *); 33static void nvc0_graph_isr(struct drm_device *);
34static void nvc0_runk140_isr(struct drm_device *);
34static int nvc0_graph_unload_context_to(struct drm_device *dev, u64 chan); 35static int nvc0_graph_unload_context_to(struct drm_device *dev, u64 chan);
35 36
36void 37void
@@ -281,6 +282,7 @@ nvc0_graph_destroy(struct drm_device *dev)
281 return; 282 return;
282 283
283 nouveau_irq_unregister(dev, 12); 284 nouveau_irq_unregister(dev, 12);
285 nouveau_irq_unregister(dev, 25);
284 286
285 nouveau_gpuobj_ref(NULL, &priv->unk4188b8); 287 nouveau_gpuobj_ref(NULL, &priv->unk4188b8);
286 nouveau_gpuobj_ref(NULL, &priv->unk4188b4); 288 nouveau_gpuobj_ref(NULL, &priv->unk4188b4);
@@ -390,6 +392,7 @@ nvc0_graph_create(struct drm_device *dev)
390 } 392 }
391 393
392 nouveau_irq_register(dev, 12, nvc0_graph_isr); 394 nouveau_irq_register(dev, 12, nvc0_graph_isr);
395 nouveau_irq_register(dev, 25, nvc0_runk140_isr);
393 NVOBJ_CLASS(dev, 0x902d, GR); /* 2D */ 396 NVOBJ_CLASS(dev, 0x902d, GR); /* 2D */
394 NVOBJ_CLASS(dev, 0x9039, GR); /* M2MF */ 397 NVOBJ_CLASS(dev, 0x9039, GR); /* M2MF */
395 NVOBJ_CLASS(dev, 0x9097, GR); /* 3D */ 398 NVOBJ_CLASS(dev, 0x9097, GR); /* 3D */
@@ -512,8 +515,8 @@ nvc0_graph_init_gpc_1(struct drm_device *dev)
512 nv_wr32(dev, TP_UNIT(gpc, tp, 0x224), 0xc0000000); 515 nv_wr32(dev, TP_UNIT(gpc, tp, 0x224), 0xc0000000);
513 nv_wr32(dev, TP_UNIT(gpc, tp, 0x48c), 0xc0000000); 516 nv_wr32(dev, TP_UNIT(gpc, tp, 0x48c), 0xc0000000);
514 nv_wr32(dev, TP_UNIT(gpc, tp, 0x084), 0xc0000000); 517 nv_wr32(dev, TP_UNIT(gpc, tp, 0x084), 0xc0000000);
515 nv_wr32(dev, TP_UNIT(gpc, tp, 0xe44), 0x001ffffe); 518 nv_wr32(dev, TP_UNIT(gpc, tp, 0x644), 0x001ffffe);
516 nv_wr32(dev, TP_UNIT(gpc, tp, 0xe4c), 0x0000000f); 519 nv_wr32(dev, TP_UNIT(gpc, tp, 0x64c), 0x0000000f);
517 } 520 }
518 nv_wr32(dev, GPC_UNIT(gpc, 0x2c90), 0xffffffff); 521 nv_wr32(dev, GPC_UNIT(gpc, 0x2c90), 0xffffffff);
519 nv_wr32(dev, GPC_UNIT(gpc, 0x2c94), 0xffffffff); 522 nv_wr32(dev, GPC_UNIT(gpc, 0x2c94), 0xffffffff);
@@ -777,3 +780,19 @@ nvc0_graph_isr(struct drm_device *dev)
777 780
778 nv_wr32(dev, 0x400500, 0x00010001); 781 nv_wr32(dev, 0x400500, 0x00010001);
779} 782}
783
784static void
785nvc0_runk140_isr(struct drm_device *dev)
786{
787 u32 units = nv_rd32(dev, 0x00017c) & 0x1f;
788
789 while (units) {
790 u32 unit = ffs(units) - 1;
791 u32 reg = 0x140000 + unit * 0x2000;
792 u32 st0 = nv_mask(dev, reg + 0x1020, 0, 0);
793 u32 st1 = nv_mask(dev, reg + 0x1420, 0, 0);
794
795 NV_INFO(dev, "PRUNK140: %d 0x%08x 0x%08x\n", unit, st0, st1);
796 units &= ~(1 << unit);
797 }
798}
diff --git a/drivers/gpu/drm/nouveau/nvc0_grctx.c b/drivers/gpu/drm/nouveau/nvc0_grctx.c
index b9e68b2d30aa..f880ff776db8 100644
--- a/drivers/gpu/drm/nouveau/nvc0_grctx.c
+++ b/drivers/gpu/drm/nouveau/nvc0_grctx.c
@@ -1830,7 +1830,7 @@ nvc0_grctx_generate(struct nouveau_channel *chan)
1830 1830
1831 for (tp = 0, id = 0; tp < 4; tp++) { 1831 for (tp = 0, id = 0; tp < 4; tp++) {
1832 for (gpc = 0; gpc < priv->gpc_nr; gpc++) { 1832 for (gpc = 0; gpc < priv->gpc_nr; gpc++) {
1833 if (tp <= priv->tp_nr[gpc]) { 1833 if (tp < priv->tp_nr[gpc]) {
1834 nv_wr32(dev, TP_UNIT(gpc, tp, 0x698), id); 1834 nv_wr32(dev, TP_UNIT(gpc, tp, 0x698), id);
1835 nv_wr32(dev, TP_UNIT(gpc, tp, 0x4e8), id); 1835 nv_wr32(dev, TP_UNIT(gpc, tp, 0x4e8), id);
1836 nv_wr32(dev, GPC_UNIT(gpc, 0x0c10 + tp * 4), id); 1836 nv_wr32(dev, GPC_UNIT(gpc, 0x0c10 + tp * 4), id);