diff options
Diffstat (limited to 'drivers/gpu/drm/nouveau')
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_bo.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_channel.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_mem.c | 16 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv20_graph.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv40_graph.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv50_instmem.c | 2 |
6 files changed, 16 insertions, 13 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index 6f3c19522377..9f5ab4677758 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c | |||
@@ -783,7 +783,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem) | |||
783 | break; | 783 | break; |
784 | case TTM_PL_VRAM: | 784 | case TTM_PL_VRAM: |
785 | mem->bus.offset = mem->mm_node->start << PAGE_SHIFT; | 785 | mem->bus.offset = mem->mm_node->start << PAGE_SHIFT; |
786 | mem->bus.base = drm_get_resource_start(dev, 1); | 786 | mem->bus.base = pci_resource_start(dev->pdev, 1); |
787 | mem->bus.is_iomem = true; | 787 | mem->bus.is_iomem = true; |
788 | break; | 788 | break; |
789 | default: | 789 | default: |
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c index 1fc57ef58295..06555c7cde50 100644 --- a/drivers/gpu/drm/nouveau/nouveau_channel.c +++ b/drivers/gpu/drm/nouveau/nouveau_channel.c | |||
@@ -62,7 +62,8 @@ nouveau_channel_pushbuf_ctxdma_init(struct nouveau_channel *chan) | |||
62 | * VRAM. | 62 | * VRAM. |
63 | */ | 63 | */ |
64 | ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, | 64 | ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, |
65 | drm_get_resource_start(dev, 1), | 65 | pci_resource_start(dev->pdev, |
66 | 1), | ||
66 | dev_priv->fb_available_size, | 67 | dev_priv->fb_available_size, |
67 | NV_DMA_ACCESS_RO, | 68 | NV_DMA_ACCESS_RO, |
68 | NV_DMA_TARGET_PCI, &pushbuf); | 69 | NV_DMA_TARGET_PCI, &pushbuf); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c index 775a7017af64..37c7bf8e8296 100644 --- a/drivers/gpu/drm/nouveau/nouveau_mem.c +++ b/drivers/gpu/drm/nouveau/nouveau_mem.c | |||
@@ -471,8 +471,9 @@ void nouveau_mem_close(struct drm_device *dev) | |||
471 | } | 471 | } |
472 | 472 | ||
473 | if (dev_priv->fb_mtrr) { | 473 | if (dev_priv->fb_mtrr) { |
474 | drm_mtrr_del(dev_priv->fb_mtrr, drm_get_resource_start(dev, 1), | 474 | drm_mtrr_del(dev_priv->fb_mtrr, |
475 | drm_get_resource_len(dev, 1), DRM_MTRR_WC); | 475 | pci_resource_start(dev->pdev, 1), |
476 | pci_resource_len(dev->pdev, 1), DRM_MTRR_WC); | ||
476 | dev_priv->fb_mtrr = 0; | 477 | dev_priv->fb_mtrr = 0; |
477 | } | 478 | } |
478 | } | 479 | } |
@@ -632,7 +633,7 @@ nouveau_mem_init(struct drm_device *dev) | |||
632 | struct ttm_bo_device *bdev = &dev_priv->ttm.bdev; | 633 | struct ttm_bo_device *bdev = &dev_priv->ttm.bdev; |
633 | int ret, dma_bits = 32; | 634 | int ret, dma_bits = 32; |
634 | 635 | ||
635 | dev_priv->fb_phys = drm_get_resource_start(dev, 1); | 636 | dev_priv->fb_phys = pci_resource_start(dev->pdev, 1); |
636 | dev_priv->gart_info.type = NOUVEAU_GART_NONE; | 637 | dev_priv->gart_info.type = NOUVEAU_GART_NONE; |
637 | 638 | ||
638 | if (dev_priv->card_type >= NV_50 && | 639 | if (dev_priv->card_type >= NV_50 && |
@@ -664,8 +665,9 @@ nouveau_mem_init(struct drm_device *dev) | |||
664 | 665 | ||
665 | dev_priv->fb_available_size = dev_priv->vram_size; | 666 | dev_priv->fb_available_size = dev_priv->vram_size; |
666 | dev_priv->fb_mappable_pages = dev_priv->fb_available_size; | 667 | dev_priv->fb_mappable_pages = dev_priv->fb_available_size; |
667 | if (dev_priv->fb_mappable_pages > drm_get_resource_len(dev, 1)) | 668 | if (dev_priv->fb_mappable_pages > pci_resource_len(dev->pdev, 1)) |
668 | dev_priv->fb_mappable_pages = drm_get_resource_len(dev, 1); | 669 | dev_priv->fb_mappable_pages = |
670 | pci_resource_len(dev->pdev, 1); | ||
669 | dev_priv->fb_mappable_pages >>= PAGE_SHIFT; | 671 | dev_priv->fb_mappable_pages >>= PAGE_SHIFT; |
670 | 672 | ||
671 | /* remove reserved space at end of vram from available amount */ | 673 | /* remove reserved space at end of vram from available amount */ |
@@ -717,8 +719,8 @@ nouveau_mem_init(struct drm_device *dev) | |||
717 | return ret; | 719 | return ret; |
718 | } | 720 | } |
719 | 721 | ||
720 | dev_priv->fb_mtrr = drm_mtrr_add(drm_get_resource_start(dev, 1), | 722 | dev_priv->fb_mtrr = drm_mtrr_add(pci_resource_start(dev->pdev, 1), |
721 | drm_get_resource_len(dev, 1), | 723 | pci_resource_len(dev->pdev, 1), |
722 | DRM_MTRR_WC); | 724 | DRM_MTRR_WC); |
723 | 725 | ||
724 | return 0; | 726 | return 0; |
diff --git a/drivers/gpu/drm/nouveau/nv20_graph.c b/drivers/gpu/drm/nouveau/nv20_graph.c index d6fc0a82f03d..fe2349b115f0 100644 --- a/drivers/gpu/drm/nouveau/nv20_graph.c +++ b/drivers/gpu/drm/nouveau/nv20_graph.c | |||
@@ -616,7 +616,7 @@ nv20_graph_init(struct drm_device *dev) | |||
616 | nv_wr32(dev, NV10_PGRAPH_SURFACE, tmp); | 616 | nv_wr32(dev, NV10_PGRAPH_SURFACE, tmp); |
617 | 617 | ||
618 | /* begin RAM config */ | 618 | /* begin RAM config */ |
619 | vramsz = drm_get_resource_len(dev, 0) - 1; | 619 | vramsz = pci_resource_len(dev->pdev, 0) - 1; |
620 | nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0)); | 620 | nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0)); |
621 | nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1)); | 621 | nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1)); |
622 | nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0000); | 622 | nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0000); |
@@ -717,7 +717,7 @@ nv30_graph_init(struct drm_device *dev) | |||
717 | nv_wr32(dev, 0x0040075c , 0x00000001); | 717 | nv_wr32(dev, 0x0040075c , 0x00000001); |
718 | 718 | ||
719 | /* begin RAM config */ | 719 | /* begin RAM config */ |
720 | /* vramsz = drm_get_resource_len(dev, 0) - 1; */ | 720 | /* vramsz = pci_resource_len(dev->pdev, 0) - 1; */ |
721 | nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0)); | 721 | nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0)); |
722 | nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1)); | 722 | nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1)); |
723 | if (dev_priv->chipset != 0x34) { | 723 | if (dev_priv->chipset != 0x34) { |
diff --git a/drivers/gpu/drm/nouveau/nv40_graph.c b/drivers/gpu/drm/nouveau/nv40_graph.c index 704a25d04ac9..65b13b54c5ae 100644 --- a/drivers/gpu/drm/nouveau/nv40_graph.c +++ b/drivers/gpu/drm/nouveau/nv40_graph.c | |||
@@ -367,7 +367,7 @@ nv40_graph_init(struct drm_device *dev) | |||
367 | nv40_graph_set_region_tiling(dev, i, 0, 0, 0); | 367 | nv40_graph_set_region_tiling(dev, i, 0, 0, 0); |
368 | 368 | ||
369 | /* begin RAM config */ | 369 | /* begin RAM config */ |
370 | vramsz = drm_get_resource_len(dev, 0) - 1; | 370 | vramsz = pci_resource_len(dev->pdev, 0) - 1; |
371 | switch (dev_priv->chipset) { | 371 | switch (dev_priv->chipset) { |
372 | case 0x40: | 372 | case 0x40: |
373 | nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0)); | 373 | nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0)); |
diff --git a/drivers/gpu/drm/nouveau/nv50_instmem.c b/drivers/gpu/drm/nouveau/nv50_instmem.c index 5f21df31f3aa..71c01b6e5731 100644 --- a/drivers/gpu/drm/nouveau/nv50_instmem.c +++ b/drivers/gpu/drm/nouveau/nv50_instmem.c | |||
@@ -241,7 +241,7 @@ nv50_instmem_init(struct drm_device *dev) | |||
241 | return ret; | 241 | return ret; |
242 | BAR0_WI32(priv->fb_bar->gpuobj, 0x00, 0x7fc00000); | 242 | BAR0_WI32(priv->fb_bar->gpuobj, 0x00, 0x7fc00000); |
243 | BAR0_WI32(priv->fb_bar->gpuobj, 0x04, 0x40000000 + | 243 | BAR0_WI32(priv->fb_bar->gpuobj, 0x04, 0x40000000 + |
244 | drm_get_resource_len(dev, 1) - 1); | 244 | pci_resource_len(dev->pdev, 1) - 1); |
245 | BAR0_WI32(priv->fb_bar->gpuobj, 0x08, 0x40000000); | 245 | BAR0_WI32(priv->fb_bar->gpuobj, 0x08, 0x40000000); |
246 | BAR0_WI32(priv->fb_bar->gpuobj, 0x0c, 0x00000000); | 246 | BAR0_WI32(priv->fb_bar->gpuobj, 0x0c, 0x00000000); |
247 | BAR0_WI32(priv->fb_bar->gpuobj, 0x10, 0x00000000); | 247 | BAR0_WI32(priv->fb_bar->gpuobj, 0x10, 0x00000000); |