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path: root/drivers/gpu/drm/nouveau/nv50_graph.c
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Diffstat (limited to 'drivers/gpu/drm/nouveau/nv50_graph.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv50_graph.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c
index 2d7ea75a09d4..37e21d2be95b 100644
--- a/drivers/gpu/drm/nouveau/nv50_graph.c
+++ b/drivers/gpu/drm/nouveau/nv50_graph.c
@@ -256,6 +256,7 @@ nv50_graph_destroy_context(struct nouveau_channel *chan)
256 struct drm_device *dev = chan->dev; 256 struct drm_device *dev = chan->dev;
257 struct drm_nouveau_private *dev_priv = dev->dev_private; 257 struct drm_nouveau_private *dev_priv = dev->dev_private;
258 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph; 258 struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
259 struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
259 int i, hdr = (dev_priv->chipset == 0x50) ? 0x200 : 0x20; 260 int i, hdr = (dev_priv->chipset == 0x50) ? 0x200 : 0x20;
260 unsigned long flags; 261 unsigned long flags;
261 262
@@ -265,6 +266,7 @@ nv50_graph_destroy_context(struct nouveau_channel *chan)
265 return; 266 return;
266 267
267 spin_lock_irqsave(&dev_priv->context_switch_lock, flags); 268 spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
269 pfifo->reassign(dev, false);
268 pgraph->fifo_access(dev, false); 270 pgraph->fifo_access(dev, false);
269 271
270 if (pgraph->channel(dev) == chan) 272 if (pgraph->channel(dev) == chan)
@@ -275,6 +277,7 @@ nv50_graph_destroy_context(struct nouveau_channel *chan)
275 dev_priv->engine.instmem.flush(dev); 277 dev_priv->engine.instmem.flush(dev);
276 278
277 pgraph->fifo_access(dev, true); 279 pgraph->fifo_access(dev, true);
280 pfifo->reassign(dev, true);
278 spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags); 281 spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
279 282
280 nouveau_gpuobj_ref(NULL, &chan->ramin_grctx); 283 nouveau_gpuobj_ref(NULL, &chan->ramin_grctx);