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path: root/drivers/gpu/drm/nouveau/nv50_crtc.c
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Diffstat (limited to 'drivers/gpu/drm/nouveau/nv50_crtc.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv50_crtc.c27
1 files changed, 16 insertions, 11 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_crtc.c b/drivers/gpu/drm/nouveau/nv50_crtc.c
index 56476d0c6de8..9023c4dbb449 100644
--- a/drivers/gpu/drm/nouveau/nv50_crtc.c
+++ b/drivers/gpu/drm/nouveau/nv50_crtc.c
@@ -115,15 +115,16 @@ nv50_crtc_blank(struct nouveau_crtc *nv_crtc, bool blanked)
115 OUT_RING(evo, 0); 115 OUT_RING(evo, 0);
116 BEGIN_RING(evo, 0, NV50_EVO_CRTC(index, FB_DMA), 1); 116 BEGIN_RING(evo, 0, NV50_EVO_CRTC(index, FB_DMA), 1);
117 if (dev_priv->chipset != 0x50) 117 if (dev_priv->chipset != 0x50)
118 if (nv_crtc->fb.tile_flags == 0x7a00) 118 if (nv_crtc->fb.tile_flags == 0x7a00 ||
119 nv_crtc->fb.tile_flags == 0xfe00)
119 OUT_RING(evo, NvEvoFB32); 120 OUT_RING(evo, NvEvoFB32);
120 else 121 else
121 if (nv_crtc->fb.tile_flags == 0x7000) 122 if (nv_crtc->fb.tile_flags == 0x7000)
122 OUT_RING(evo, NvEvoFB16); 123 OUT_RING(evo, NvEvoFB16);
123 else 124 else
124 OUT_RING(evo, NvEvoVRAM); 125 OUT_RING(evo, NvEvoVRAM_LP);
125 else 126 else
126 OUT_RING(evo, NvEvoVRAM); 127 OUT_RING(evo, NvEvoVRAM_LP);
127 } 128 }
128 129
129 nv_crtc->fb.blanked = blanked; 130 nv_crtc->fb.blanked = blanked;
@@ -345,7 +346,6 @@ nv50_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
345 uint32_t buffer_handle, uint32_t width, uint32_t height) 346 uint32_t buffer_handle, uint32_t width, uint32_t height)
346{ 347{
347 struct drm_device *dev = crtc->dev; 348 struct drm_device *dev = crtc->dev;
348 struct drm_nouveau_private *dev_priv = dev->dev_private;
349 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 349 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
350 struct nouveau_bo *cursor = NULL; 350 struct nouveau_bo *cursor = NULL;
351 struct drm_gem_object *gem; 351 struct drm_gem_object *gem;
@@ -374,8 +374,7 @@ nv50_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
374 374
375 nouveau_bo_unmap(cursor); 375 nouveau_bo_unmap(cursor);
376 376
377 nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.nvbo->bo.offset - 377 nv_crtc->cursor.set_offset(nv_crtc, nv_crtc->cursor.nvbo->bo.mem.start << PAGE_SHIFT);
378 dev_priv->vm_vram_base);
379 nv_crtc->cursor.show(nv_crtc, true); 378 nv_crtc->cursor.show(nv_crtc, true);
380 379
381out: 380out:
@@ -437,6 +436,7 @@ static const struct drm_crtc_funcs nv50_crtc_funcs = {
437 .cursor_move = nv50_crtc_cursor_move, 436 .cursor_move = nv50_crtc_cursor_move,
438 .gamma_set = nv50_crtc_gamma_set, 437 .gamma_set = nv50_crtc_gamma_set,
439 .set_config = drm_crtc_helper_set_config, 438 .set_config = drm_crtc_helper_set_config,
439 .page_flip = nouveau_crtc_page_flip,
440 .destroy = nv50_crtc_destroy, 440 .destroy = nv50_crtc_destroy,
441}; 441};
442 442
@@ -453,6 +453,7 @@ nv50_crtc_prepare(struct drm_crtc *crtc)
453 453
454 NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index); 454 NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
455 455
456 drm_vblank_pre_modeset(dev, nv_crtc->index);
456 nv50_crtc_blank(nv_crtc, true); 457 nv50_crtc_blank(nv_crtc, true);
457} 458}
458 459
@@ -468,6 +469,7 @@ nv50_crtc_commit(struct drm_crtc *crtc)
468 NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index); 469 NV_DEBUG_KMS(dev, "index %d\n", nv_crtc->index);
469 470
470 nv50_crtc_blank(nv_crtc, false); 471 nv50_crtc_blank(nv_crtc, false);
472 drm_vblank_post_modeset(dev, nv_crtc->index);
471 473
472 ret = RING_SPACE(evo, 2); 474 ret = RING_SPACE(evo, 2);
473 if (ret) { 475 if (ret) {
@@ -545,7 +547,7 @@ nv50_crtc_do_mode_set_base(struct drm_crtc *crtc,
545 return -EINVAL; 547 return -EINVAL;
546 } 548 }
547 549
548 nv_crtc->fb.offset = fb->nvbo->bo.offset - dev_priv->vm_vram_base; 550 nv_crtc->fb.offset = fb->nvbo->bo.mem.start << PAGE_SHIFT;
549 nv_crtc->fb.tile_flags = nouveau_bo_tile_layout(fb->nvbo); 551 nv_crtc->fb.tile_flags = nouveau_bo_tile_layout(fb->nvbo);
550 nv_crtc->fb.cpp = drm_fb->bits_per_pixel / 8; 552 nv_crtc->fb.cpp = drm_fb->bits_per_pixel / 8;
551 if (!nv_crtc->fb.blanked && dev_priv->chipset != 0x50) { 553 if (!nv_crtc->fb.blanked && dev_priv->chipset != 0x50) {
@@ -554,13 +556,14 @@ nv50_crtc_do_mode_set_base(struct drm_crtc *crtc,
554 return ret; 556 return ret;
555 557
556 BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, FB_DMA), 1); 558 BEGIN_RING(evo, 0, NV50_EVO_CRTC(nv_crtc->index, FB_DMA), 1);
557 if (nv_crtc->fb.tile_flags == 0x7a00) 559 if (nv_crtc->fb.tile_flags == 0x7a00 ||
560 nv_crtc->fb.tile_flags == 0xfe00)
558 OUT_RING(evo, NvEvoFB32); 561 OUT_RING(evo, NvEvoFB32);
559 else 562 else
560 if (nv_crtc->fb.tile_flags == 0x7000) 563 if (nv_crtc->fb.tile_flags == 0x7000)
561 OUT_RING(evo, NvEvoFB16); 564 OUT_RING(evo, NvEvoFB16);
562 else 565 else
563 OUT_RING(evo, NvEvoVRAM); 566 OUT_RING(evo, NvEvoVRAM_LP);
564 } 567 }
565 568
566 ret = RING_SPACE(evo, 12); 569 ret = RING_SPACE(evo, 12);
@@ -574,8 +577,10 @@ nv50_crtc_do_mode_set_base(struct drm_crtc *crtc,
574 if (!nv_crtc->fb.tile_flags) { 577 if (!nv_crtc->fb.tile_flags) {
575 OUT_RING(evo, drm_fb->pitch | (1 << 20)); 578 OUT_RING(evo, drm_fb->pitch | (1 << 20));
576 } else { 579 } else {
577 OUT_RING(evo, ((drm_fb->pitch / 4) << 4) | 580 u32 tile_mode = fb->nvbo->tile_mode;
578 fb->nvbo->tile_mode); 581 if (dev_priv->card_type >= NV_C0)
582 tile_mode >>= 4;
583 OUT_RING(evo, ((drm_fb->pitch / 4) << 4) | tile_mode);
579 } 584 }
580 if (dev_priv->chipset == 0x50) 585 if (dev_priv->chipset == 0x50)
581 OUT_RING(evo, (nv_crtc->fb.tile_flags << 8) | format); 586 OUT_RING(evo, (nv_crtc->fb.tile_flags << 8) | format);