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path: root/drivers/gpu/drm/nouveau/nv40_pm.c
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Diffstat (limited to 'drivers/gpu/drm/nouveau/nv40_pm.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv40_pm.c18
1 files changed, 8 insertions, 10 deletions
diff --git a/drivers/gpu/drm/nouveau/nv40_pm.c b/drivers/gpu/drm/nouveau/nv40_pm.c
index 3d5a5a7856e6..c7615381c5d9 100644
--- a/drivers/gpu/drm/nouveau/nv40_pm.c
+++ b/drivers/gpu/drm/nouveau/nv40_pm.c
@@ -351,10 +351,9 @@ resume:
351} 351}
352 352
353int 353int
354nv40_pm_pwm_get(struct drm_device *dev, struct dcb_gpio_entry *gpio, 354nv40_pm_pwm_get(struct drm_device *dev, int line, u32 *divs, u32 *duty)
355 u32 *divs, u32 *duty)
356{ 355{
357 if (gpio->line == 2) { 356 if (line == 2) {
358 u32 reg = nv_rd32(dev, 0x0010f0); 357 u32 reg = nv_rd32(dev, 0x0010f0);
359 if (reg & 0x80000000) { 358 if (reg & 0x80000000) {
360 *duty = (reg & 0x7fff0000) >> 16; 359 *duty = (reg & 0x7fff0000) >> 16;
@@ -362,7 +361,7 @@ nv40_pm_pwm_get(struct drm_device *dev, struct dcb_gpio_entry *gpio,
362 return 0; 361 return 0;
363 } 362 }
364 } else 363 } else
365 if (gpio->line == 9) { 364 if (line == 9) {
366 u32 reg = nv_rd32(dev, 0x0015f4); 365 u32 reg = nv_rd32(dev, 0x0015f4);
367 if (reg & 0x80000000) { 366 if (reg & 0x80000000) {
368 *divs = nv_rd32(dev, 0x0015f8); 367 *divs = nv_rd32(dev, 0x0015f8);
@@ -370,7 +369,7 @@ nv40_pm_pwm_get(struct drm_device *dev, struct dcb_gpio_entry *gpio,
370 return 0; 369 return 0;
371 } 370 }
372 } else { 371 } else {
373 NV_ERROR(dev, "unknown pwm ctrl for gpio %d\n", gpio->line); 372 NV_ERROR(dev, "unknown pwm ctrl for gpio %d\n", line);
374 return -ENODEV; 373 return -ENODEV;
375 } 374 }
376 375
@@ -378,17 +377,16 @@ nv40_pm_pwm_get(struct drm_device *dev, struct dcb_gpio_entry *gpio,
378} 377}
379 378
380int 379int
381nv40_pm_pwm_set(struct drm_device *dev, struct dcb_gpio_entry *gpio, 380nv40_pm_pwm_set(struct drm_device *dev, int line, u32 divs, u32 duty)
382 u32 divs, u32 duty)
383{ 381{
384 if (gpio->line == 2) { 382 if (line == 2) {
385 nv_wr32(dev, 0x0010f0, 0x80000000 | (duty << 16) | divs); 383 nv_wr32(dev, 0x0010f0, 0x80000000 | (duty << 16) | divs);
386 } else 384 } else
387 if (gpio->line == 9) { 385 if (line == 9) {
388 nv_wr32(dev, 0x0015f8, divs); 386 nv_wr32(dev, 0x0015f8, divs);
389 nv_wr32(dev, 0x0015f4, duty | 0x80000000); 387 nv_wr32(dev, 0x0015f4, duty | 0x80000000);
390 } else { 388 } else {
391 NV_ERROR(dev, "unknown pwm ctrl for gpio %d\n", gpio->line); 389 NV_ERROR(dev, "unknown pwm ctrl for gpio %d\n", line);
392 return -ENODEV; 390 return -ENODEV;
393 } 391 }
394 392