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path: root/drivers/gpu/drm/nouveau/nv40_pm.c
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Diffstat (limited to 'drivers/gpu/drm/nouveau/nv40_pm.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv40_pm.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/gpu/drm/nouveau/nv40_pm.c b/drivers/gpu/drm/nouveau/nv40_pm.c
index 661d9cfd980d..d857525666ee 100644
--- a/drivers/gpu/drm/nouveau/nv40_pm.c
+++ b/drivers/gpu/drm/nouveau/nv40_pm.c
@@ -107,7 +107,7 @@ struct nv40_pm_state {
107}; 107};
108 108
109static int 109static int
110nv40_calc_pll(struct drm_device *dev, u32 reg, struct pll_lims *pll, 110nv40_calc_pll(struct drm_device *dev, u32 reg, struct nvbios_pll *pll,
111 u32 clk, int *N1, int *M1, int *N2, int *M2, int *log2P) 111 u32 clk, int *N1, int *M1, int *N2, int *M2, int *log2P)
112{ 112{
113 struct nouveau_pll_vals coef; 113 struct nouveau_pll_vals coef;
@@ -117,8 +117,8 @@ nv40_calc_pll(struct drm_device *dev, u32 reg, struct pll_lims *pll,
117 if (ret) 117 if (ret)
118 return ret; 118 return ret;
119 119
120 if (clk < pll->vco1.maxfreq) 120 if (clk < pll->vco1.max_freq)
121 pll->vco2.maxfreq = 0; 121 pll->vco2.max_freq = 0;
122 122
123 ret = nouveau_calc_pll_mnp(dev, pll, clk, &coef); 123 ret = nouveau_calc_pll_mnp(dev, pll, clk, &coef);
124 if (ret == 0) 124 if (ret == 0)
@@ -127,7 +127,7 @@ nv40_calc_pll(struct drm_device *dev, u32 reg, struct pll_lims *pll,
127 *N1 = coef.N1; 127 *N1 = coef.N1;
128 *M1 = coef.M1; 128 *M1 = coef.M1;
129 if (N2 && M2) { 129 if (N2 && M2) {
130 if (pll->vco2.maxfreq) { 130 if (pll->vco2.max_freq) {
131 *N2 = coef.N2; 131 *N2 = coef.N2;
132 *M2 = coef.M2; 132 *M2 = coef.M2;
133 } else { 133 } else {
@@ -143,7 +143,7 @@ void *
143nv40_pm_clocks_pre(struct drm_device *dev, struct nouveau_pm_level *perflvl) 143nv40_pm_clocks_pre(struct drm_device *dev, struct nouveau_pm_level *perflvl)
144{ 144{
145 struct nv40_pm_state *info; 145 struct nv40_pm_state *info;
146 struct pll_lims pll; 146 struct nvbios_pll pll;
147 int N1, N2, M1, M2, log2P; 147 int N1, N2, M1, M2, log2P;
148 int ret; 148 int ret;
149 149
@@ -191,7 +191,7 @@ nv40_pm_clocks_pre(struct drm_device *dev, struct nouveau_pm_level *perflvl)
191 goto out; 191 goto out;
192 192
193 info->mpll_ctrl = 0x80000000 | (log2P << 16); 193 info->mpll_ctrl = 0x80000000 | (log2P << 16);
194 info->mpll_ctrl |= min2(pll.log2p_bias + log2P, pll.max_log2p) << 20; 194 info->mpll_ctrl |= min2(pll.bias_p + log2P, pll.max_p) << 20;
195 if (N2 == M2) { 195 if (N2 == M2) {
196 info->mpll_ctrl |= 0x00000100; 196 info->mpll_ctrl |= 0x00000100;
197 info->mpll_coef = (N1 << 8) | M1; 197 info->mpll_coef = (N1 << 8) | M1;