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path: root/drivers/gpu/drm/nouveau/nv04_tv.c
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Diffstat (limited to 'drivers/gpu/drm/nouveau/nv04_tv.c')
-rw-r--r--drivers/gpu/drm/nouveau/nv04_tv.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/gpu/drm/nouveau/nv04_tv.c b/drivers/gpu/drm/nouveau/nv04_tv.c
index 099fbeda6e2e..62e826a139b3 100644
--- a/drivers/gpu/drm/nouveau/nv04_tv.c
+++ b/drivers/gpu/drm/nouveau/nv04_tv.c
@@ -75,8 +75,8 @@ static void nv04_tv_dpms(struct drm_encoder *encoder, int mode)
75 struct nv04_mode_state *state = &nv04_display(dev)->mode_reg; 75 struct nv04_mode_state *state = &nv04_display(dev)->mode_reg;
76 uint8_t crtc1A; 76 uint8_t crtc1A;
77 77
78 NV_INFO(drm, "Setting dpms mode %d on TV encoder (output %d)\n", 78 NV_DEBUG(drm, "Setting dpms mode %d on TV encoder (output %d)\n",
79 mode, nv_encoder->dcb->index); 79 mode, nv_encoder->dcb->index);
80 80
81 state->pllsel &= ~(PLLSEL_TV_CRTC1_MASK | PLLSEL_TV_CRTC2_MASK); 81 state->pllsel &= ~(PLLSEL_TV_CRTC1_MASK | PLLSEL_TV_CRTC2_MASK);
82 82
@@ -167,9 +167,8 @@ static void nv04_tv_commit(struct drm_encoder *encoder)
167 167
168 helper->dpms(encoder, DRM_MODE_DPMS_ON); 168 helper->dpms(encoder, DRM_MODE_DPMS_ON);
169 169
170 NV_INFO(drm, "Output %s is running on CRTC %d using output %c\n", 170 NV_DEBUG(drm, "Output %s is running on CRTC %d using output %c\n",
171 drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base), nv_crtc->index, 171 drm_get_connector_name(&nouveau_encoder_connector_get(nv_encoder)->base), nv_crtc->index, '@' + ffs(nv_encoder->dcb->or));
172 '@' + ffs(nv_encoder->dcb->or));
173} 172}
174 173
175static void nv04_tv_destroy(struct drm_encoder *encoder) 174static void nv04_tv_destroy(struct drm_encoder *encoder)