1 files changed, 62 insertions, 15 deletions

diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index e76ec2d207a9..a4851af5b05e 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -76,6 +76,8 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->fifo.disable            = nv04_fifo_disable;
                 engine->fifo.enable             = nv04_fifo_enable;
                 engine->fifo.reassign           = nv04_fifo_reassign;
+                engine->fifo.cache_flush        = nv04_fifo_cache_flush;
+                engine->fifo.cache_pull         = nv04_fifo_cache_pull;
                 engine->fifo.channel_id         = nv04_fifo_channel_id;
                 engine->fifo.create_context     = nv04_fifo_create_context;
                 engine->fifo.destroy_context    = nv04_fifo_destroy_context;
@@ -100,6 +102,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->timer.takedown          = nv04_timer_takedown;
                 engine->fb.init                 = nv10_fb_init;
                 engine->fb.takedown             = nv10_fb_takedown;
+                engine->fb.set_region_tiling    = nv10_fb_set_region_tiling;
                 engine->graph.grclass           = nv10_graph_grclass;
                 engine->graph.init              = nv10_graph_init;
                 engine->graph.takedown          = nv10_graph_takedown;
@@ -109,12 +112,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->graph.fifo_access       = nv04_graph_fifo_access;
                 engine->graph.load_context      = nv10_graph_load_context;
                 engine->graph.unload_context    = nv10_graph_unload_context;
+                engine->graph.set_region_tiling = nv10_graph_set_region_tiling;
                 engine->fifo.channels           = 32;
                 engine->fifo.init               = nv10_fifo_init;
                 engine->fifo.takedown           = nouveau_stub_takedown;
                 engine->fifo.disable            = nv04_fifo_disable;
                 engine->fifo.enable             = nv04_fifo_enable;
                 engine->fifo.reassign           = nv04_fifo_reassign;
+                engine->fifo.cache_flush        = nv04_fifo_cache_flush;
+                engine->fifo.cache_pull         = nv04_fifo_cache_pull;
                 engine->fifo.channel_id         = nv10_fifo_channel_id;
                 engine->fifo.create_context     = nv10_fifo_create_context;
                 engine->fifo.destroy_context    = nv10_fifo_destroy_context;
@@ -139,6 +145,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->timer.takedown          = nv04_timer_takedown;
                 engine->fb.init                 = nv10_fb_init;
                 engine->fb.takedown             = nv10_fb_takedown;
+                engine->fb.set_region_tiling    = nv10_fb_set_region_tiling;
                 engine->graph.grclass           = nv20_graph_grclass;
                 engine->graph.init              = nv20_graph_init;
                 engine->graph.takedown          = nv20_graph_takedown;
@@ -148,12 +155,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->graph.fifo_access       = nv04_graph_fifo_access;
                 engine->graph.load_context      = nv20_graph_load_context;
                 engine->graph.unload_context    = nv20_graph_unload_context;
+                engine->graph.set_region_tiling = nv20_graph_set_region_tiling;
                 engine->fifo.channels           = 32;
                 engine->fifo.init               = nv10_fifo_init;
                 engine->fifo.takedown           = nouveau_stub_takedown;
                 engine->fifo.disable            = nv04_fifo_disable;
                 engine->fifo.enable             = nv04_fifo_enable;
                 engine->fifo.reassign           = nv04_fifo_reassign;
+                engine->fifo.cache_flush        = nv04_fifo_cache_flush;
+                engine->fifo.cache_pull         = nv04_fifo_cache_pull;
                 engine->fifo.channel_id         = nv10_fifo_channel_id;
                 engine->fifo.create_context     = nv10_fifo_create_context;
                 engine->fifo.destroy_context    = nv10_fifo_destroy_context;
@@ -178,6 +188,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->timer.takedown          = nv04_timer_takedown;
                 engine->fb.init                 = nv10_fb_init;
                 engine->fb.takedown             = nv10_fb_takedown;
+                engine->fb.set_region_tiling    = nv10_fb_set_region_tiling;
                 engine->graph.grclass           = nv30_graph_grclass;
                 engine->graph.init              = nv30_graph_init;
                 engine->graph.takedown          = nv20_graph_takedown;
@@ -187,12 +198,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->graph.destroy_context   = nv20_graph_destroy_context;
                 engine->graph.load_context      = nv20_graph_load_context;
                 engine->graph.unload_context    = nv20_graph_unload_context;
+                engine->graph.set_region_tiling = nv20_graph_set_region_tiling;
                 engine->fifo.channels           = 32;
                 engine->fifo.init               = nv10_fifo_init;
                 engine->fifo.takedown           = nouveau_stub_takedown;
                 engine->fifo.disable            = nv04_fifo_disable;
                 engine->fifo.enable             = nv04_fifo_enable;
                 engine->fifo.reassign           = nv04_fifo_reassign;
+                engine->fifo.cache_flush        = nv04_fifo_cache_flush;
+                engine->fifo.cache_pull         = nv04_fifo_cache_pull;
                 engine->fifo.channel_id         = nv10_fifo_channel_id;
                 engine->fifo.create_context     = nv10_fifo_create_context;
                 engine->fifo.destroy_context    = nv10_fifo_destroy_context;
@@ -218,6 +232,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->timer.takedown          = nv04_timer_takedown;
                 engine->fb.init                 = nv40_fb_init;
                 engine->fb.takedown             = nv40_fb_takedown;
+                engine->fb.set_region_tiling    = nv40_fb_set_region_tiling;
                 engine->graph.grclass           = nv40_graph_grclass;
                 engine->graph.init              = nv40_graph_init;
                 engine->graph.takedown          = nv40_graph_takedown;
@@ -227,12 +242,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->graph.destroy_context   = nv40_graph_destroy_context;
                 engine->graph.load_context      = nv40_graph_load_context;
                 engine->graph.unload_context    = nv40_graph_unload_context;
+                engine->graph.set_region_tiling = nv40_graph_set_region_tiling;
                 engine->fifo.channels           = 32;
                 engine->fifo.init               = nv40_fifo_init;
                 engine->fifo.takedown           = nouveau_stub_takedown;
                 engine->fifo.disable            = nv04_fifo_disable;
                 engine->fifo.enable             = nv04_fifo_enable;
                 engine->fifo.reassign           = nv04_fifo_reassign;
+                engine->fifo.cache_flush        = nv04_fifo_cache_flush;
+                engine->fifo.cache_pull         = nv04_fifo_cache_pull;
                 engine->fifo.channel_id         = nv10_fifo_channel_id;
                 engine->fifo.create_context     = nv40_fifo_create_context;
                 engine->fifo.destroy_context    = nv40_fifo_destroy_context;
@@ -292,6 +310,14 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
 static unsigned int
 nouveau_vga_set_decode(void *priv, bool state)
 {
+        struct drm_device *dev = priv;
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+        if (dev_priv->chipset >= 0x40)
+                nv_wr32(dev, 0x88054, state);
+        else
+                nv_wr32(dev, 0x1854, state);
+
         if (state)
                 return VGA_RSRC_LEGACY_IO | VGA_RSRC_LEGACY_MEM |
                        VGA_RSRC_NORMAL_IO | VGA_RSRC_NORMAL_MEM;
@@ -409,15 +435,19 @@ nouveau_card_init(struct drm_device *dev)
         if (ret)
                 goto out_timer;
 
-        /* PGRAPH */
-        ret = engine->graph.init(dev);
-        if (ret)
-                goto out_fb;
+        if (nouveau_noaccel)
+                engine->graph.accel_blocked = true;
+        else {
+                /* PGRAPH */
+                ret = engine->graph.init(dev);
+                if (ret)
+                        goto out_fb;
 
-        /* PFIFO */
-        ret = engine->fifo.init(dev);
-        if (ret)
-                goto out_graph;
+                /* PFIFO */
+                ret = engine->fifo.init(dev);
+                if (ret)
+                        goto out_graph;
+        }
 
         /* this call irq_preinstall, register irq handler and
          * call irq_postinstall
@@ -461,9 +491,11 @@ nouveau_card_init(struct drm_device *dev)
 out_irq:
         drm_irq_uninstall(dev);
 out_fifo:
-        engine->fifo.takedown(dev);
+        if (!nouveau_noaccel)
+                engine->fifo.takedown(dev);
 out_graph:
-        engine->graph.takedown(dev);
+        if (!nouveau_noaccel)
+                engine->graph.takedown(dev);
 out_fb:
         engine->fb.takedown(dev);
 out_timer:
@@ -500,13 +532,16 @@ static void nouveau_card_takedown(struct drm_device *dev)
                         dev_priv->channel = NULL;
                 }
 
-                engine->fifo.takedown(dev);
-                engine->graph.takedown(dev);
+                if (!nouveau_noaccel) {
+                        engine->fifo.takedown(dev);
+                        engine->graph.takedown(dev);
+                }
                 engine->fb.takedown(dev);
                 engine->timer.takedown(dev);
                 engine->mc.takedown(dev);
 
                 mutex_lock(&dev->struct_mutex);
+                ttm_bo_clean_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
                 ttm_bo_clean_mm(&dev_priv->ttm.bdev, TTM_PL_TT);
                 mutex_unlock(&dev->struct_mutex);
                 nouveau_sgdma_takedown(dev);
@@ -624,7 +659,10 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
                 dev_priv->chipset = (reg0 & 0xff00000) >> 20;
         /* NV04 or NV05 */
         } else if ((reg0 & 0xff00fff0) == 0x20004000) {
-                dev_priv->chipset = 0x04;
+                if (reg0 & 0x00f00000)
+                        dev_priv->chipset = 0x05;
+                else
+                        dev_priv->chipset = 0x04;
         } else
                 dev_priv->chipset = 0xff;
 
@@ -704,8 +742,8 @@ static void nouveau_close(struct drm_device *dev)
 {
         struct drm_nouveau_private *dev_priv = dev->dev_private;
 
-        /* In the case of an error dev_priv may not be be allocated yet */
-        if (dev_priv && dev_priv->card_type)
+        /* In the case of an error dev_priv may not be allocated yet */
+        if (dev_priv)
                 nouveau_card_takedown(dev);
 }
 
@@ -795,6 +833,15 @@ int nouveau_ioctl_getparam(struct drm_device *dev, void *data,
         case NOUVEAU_GETPARAM_VM_VRAM_BASE:
                 getparam->value = dev_priv->vm_vram_base;
                 break;
+        case NOUVEAU_GETPARAM_GRAPH_UNITS:
+                /* NV40 and NV50 versions are quite different, but register
+                 * address is the same. User is supposed to know the card
+                 * family anyway... */
+                if (dev_priv->chipset >= 0x40) {
+                        getparam->value = nv_rd32(dev, NV40_PMC_GRAPH_UNITS);
+                        break;
+                }
+                /* FALLTHRU */
         default:
                 NV_ERROR(dev, "unknown parameter %lld\n", getparam->param);
                 return -EINVAL;