aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/nouveau/nouveau_state.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_state.c')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_state.c17
1 files changed, 15 insertions, 2 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index ed7757f14083..049f755567e5 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -354,6 +354,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
354 engine->graph.destroy_context = nv50_graph_destroy_context; 354 engine->graph.destroy_context = nv50_graph_destroy_context;
355 engine->graph.load_context = nv50_graph_load_context; 355 engine->graph.load_context = nv50_graph_load_context;
356 engine->graph.unload_context = nv50_graph_unload_context; 356 engine->graph.unload_context = nv50_graph_unload_context;
357 if (dev_priv->chipset != 0x86)
358 engine->graph.tlb_flush = nv50_graph_tlb_flush;
359 else {
360 /* from what i can see nvidia do this on every
361 * pre-NVA3 board except NVAC, but, we've only
362 * ever seen problems on NV86
363 */
364 engine->graph.tlb_flush = nv86_graph_tlb_flush;
365 }
357 engine->fifo.channels = 128; 366 engine->fifo.channels = 128;
358 engine->fifo.init = nv50_fifo_init; 367 engine->fifo.init = nv50_fifo_init;
359 engine->fifo.takedown = nv50_fifo_takedown; 368 engine->fifo.takedown = nv50_fifo_takedown;
@@ -365,6 +374,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
365 engine->fifo.destroy_context = nv50_fifo_destroy_context; 374 engine->fifo.destroy_context = nv50_fifo_destroy_context;
366 engine->fifo.load_context = nv50_fifo_load_context; 375 engine->fifo.load_context = nv50_fifo_load_context;
367 engine->fifo.unload_context = nv50_fifo_unload_context; 376 engine->fifo.unload_context = nv50_fifo_unload_context;
377 engine->fifo.tlb_flush = nv50_fifo_tlb_flush;
368 engine->display.early_init = nv50_display_early_init; 378 engine->display.early_init = nv50_display_early_init;
369 engine->display.late_takedown = nv50_display_late_takedown; 379 engine->display.late_takedown = nv50_display_late_takedown;
370 engine->display.create = nv50_display_create; 380 engine->display.create = nv50_display_create;
@@ -1041,6 +1051,9 @@ int nouveau_ioctl_getparam(struct drm_device *dev, void *data,
1041 case NOUVEAU_GETPARAM_PTIMER_TIME: 1051 case NOUVEAU_GETPARAM_PTIMER_TIME:
1042 getparam->value = dev_priv->engine.timer.read(dev); 1052 getparam->value = dev_priv->engine.timer.read(dev);
1043 break; 1053 break;
1054 case NOUVEAU_GETPARAM_HAS_BO_USAGE:
1055 getparam->value = 1;
1056 break;
1044 case NOUVEAU_GETPARAM_GRAPH_UNITS: 1057 case NOUVEAU_GETPARAM_GRAPH_UNITS:
1045 /* NV40 and NV50 versions are quite different, but register 1058 /* NV40 and NV50 versions are quite different, but register
1046 * address is the same. User is supposed to know the card 1059 * address is the same. User is supposed to know the card
@@ -1051,7 +1064,7 @@ int nouveau_ioctl_getparam(struct drm_device *dev, void *data,
1051 } 1064 }
1052 /* FALLTHRU */ 1065 /* FALLTHRU */
1053 default: 1066 default:
1054 NV_ERROR(dev, "unknown parameter %lld\n", getparam->param); 1067 NV_DEBUG(dev, "unknown parameter %lld\n", getparam->param);
1055 return -EINVAL; 1068 return -EINVAL;
1056 } 1069 }
1057 1070
@@ -1066,7 +1079,7 @@ nouveau_ioctl_setparam(struct drm_device *dev, void *data,
1066 1079
1067 switch (setparam->param) { 1080 switch (setparam->param) {
1068 default: 1081 default:
1069 NV_ERROR(dev, "unknown parameter %lld\n", setparam->param); 1082 NV_DEBUG(dev, "unknown parameter %lld\n", setparam->param);
1070 return -EINVAL; 1083 return -EINVAL;
1071 } 1084 }
1072 1085