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path: root/drivers/gpu/drm/nouveau/nouveau_drv.h
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Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_drv.h')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.h45
1 files changed, 42 insertions, 3 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index e15db15dca77..e424bf74d706 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -410,7 +410,7 @@ enum nv04_fp_display_regs {
410 410
411struct nv04_crtc_reg { 411struct nv04_crtc_reg {
412 unsigned char MiscOutReg; /* */ 412 unsigned char MiscOutReg; /* */
413 uint8_t CRTC[0x9f]; 413 uint8_t CRTC[0xa0];
414 uint8_t CR58[0x10]; 414 uint8_t CR58[0x10];
415 uint8_t Sequencer[5]; 415 uint8_t Sequencer[5];
416 uint8_t Graphics[9]; 416 uint8_t Graphics[9];
@@ -509,6 +509,7 @@ enum nouveau_card_type {
509 NV_30 = 0x30, 509 NV_30 = 0x30,
510 NV_40 = 0x40, 510 NV_40 = 0x40,
511 NV_50 = 0x50, 511 NV_50 = 0x50,
512 NV_C0 = 0xc0,
512}; 513};
513 514
514struct drm_nouveau_private { 515struct drm_nouveau_private {
@@ -536,8 +537,6 @@ struct drm_nouveau_private {
536 struct drm_global_reference mem_global_ref; 537 struct drm_global_reference mem_global_ref;
537 struct ttm_bo_global_ref bo_global_ref; 538 struct ttm_bo_global_ref bo_global_ref;
538 struct ttm_bo_device bdev; 539 struct ttm_bo_device bdev;
539 spinlock_t bo_list_lock;
540 struct list_head bo_list;
541 atomic_t validate_sequence; 540 atomic_t validate_sequence;
542 } ttm; 541 } ttm;
543 542
@@ -931,6 +930,10 @@ extern void nv40_fb_set_region_tiling(struct drm_device *, int, uint32_t,
931extern int nv50_fb_init(struct drm_device *); 930extern int nv50_fb_init(struct drm_device *);
932extern void nv50_fb_takedown(struct drm_device *); 931extern void nv50_fb_takedown(struct drm_device *);
933 932
933/* nvc0_fb.c */
934extern int nvc0_fb_init(struct drm_device *);
935extern void nvc0_fb_takedown(struct drm_device *);
936
934/* nv04_fifo.c */ 937/* nv04_fifo.c */
935extern int nv04_fifo_init(struct drm_device *); 938extern int nv04_fifo_init(struct drm_device *);
936extern void nv04_fifo_disable(struct drm_device *); 939extern void nv04_fifo_disable(struct drm_device *);
@@ -968,6 +971,20 @@ extern void nv50_fifo_destroy_context(struct nouveau_channel *);
968extern int nv50_fifo_load_context(struct nouveau_channel *); 971extern int nv50_fifo_load_context(struct nouveau_channel *);
969extern int nv50_fifo_unload_context(struct drm_device *); 972extern int nv50_fifo_unload_context(struct drm_device *);
970 973
974/* nvc0_fifo.c */
975extern int nvc0_fifo_init(struct drm_device *);
976extern void nvc0_fifo_takedown(struct drm_device *);
977extern void nvc0_fifo_disable(struct drm_device *);
978extern void nvc0_fifo_enable(struct drm_device *);
979extern bool nvc0_fifo_reassign(struct drm_device *, bool);
980extern bool nvc0_fifo_cache_flush(struct drm_device *);
981extern bool nvc0_fifo_cache_pull(struct drm_device *, bool);
982extern int nvc0_fifo_channel_id(struct drm_device *);
983extern int nvc0_fifo_create_context(struct nouveau_channel *);
984extern void nvc0_fifo_destroy_context(struct nouveau_channel *);
985extern int nvc0_fifo_load_context(struct nouveau_channel *);
986extern int nvc0_fifo_unload_context(struct drm_device *);
987
971/* nv04_graph.c */ 988/* nv04_graph.c */
972extern struct nouveau_pgraph_object_class nv04_graph_grclass[]; 989extern struct nouveau_pgraph_object_class nv04_graph_grclass[];
973extern int nv04_graph_init(struct drm_device *); 990extern int nv04_graph_init(struct drm_device *);
@@ -1032,6 +1049,16 @@ extern int nv50_graph_unload_context(struct drm_device *);
1032extern void nv50_graph_context_switch(struct drm_device *); 1049extern void nv50_graph_context_switch(struct drm_device *);
1033extern int nv50_grctx_init(struct nouveau_grctx *); 1050extern int nv50_grctx_init(struct nouveau_grctx *);
1034 1051
1052/* nvc0_graph.c */
1053extern int nvc0_graph_init(struct drm_device *);
1054extern void nvc0_graph_takedown(struct drm_device *);
1055extern void nvc0_graph_fifo_access(struct drm_device *, bool);
1056extern struct nouveau_channel *nvc0_graph_channel(struct drm_device *);
1057extern int nvc0_graph_create_context(struct nouveau_channel *);
1058extern void nvc0_graph_destroy_context(struct nouveau_channel *);
1059extern int nvc0_graph_load_context(struct nouveau_channel *);
1060extern int nvc0_graph_unload_context(struct drm_device *);
1061
1035/* nv04_instmem.c */ 1062/* nv04_instmem.c */
1036extern int nv04_instmem_init(struct drm_device *); 1063extern int nv04_instmem_init(struct drm_device *);
1037extern void nv04_instmem_takedown(struct drm_device *); 1064extern void nv04_instmem_takedown(struct drm_device *);
@@ -1058,6 +1085,18 @@ extern void nv50_instmem_flush(struct drm_device *);
1058extern void nv84_instmem_flush(struct drm_device *); 1085extern void nv84_instmem_flush(struct drm_device *);
1059extern void nv50_vm_flush(struct drm_device *, int engine); 1086extern void nv50_vm_flush(struct drm_device *, int engine);
1060 1087
1088/* nvc0_instmem.c */
1089extern int nvc0_instmem_init(struct drm_device *);
1090extern void nvc0_instmem_takedown(struct drm_device *);
1091extern int nvc0_instmem_suspend(struct drm_device *);
1092extern void nvc0_instmem_resume(struct drm_device *);
1093extern int nvc0_instmem_populate(struct drm_device *, struct nouveau_gpuobj *,
1094 uint32_t *size);
1095extern void nvc0_instmem_clear(struct drm_device *, struct nouveau_gpuobj *);
1096extern int nvc0_instmem_bind(struct drm_device *, struct nouveau_gpuobj *);
1097extern int nvc0_instmem_unbind(struct drm_device *, struct nouveau_gpuobj *);
1098extern void nvc0_instmem_flush(struct drm_device *);
1099
1061/* nv04_mc.c */ 1100/* nv04_mc.c */
1062extern int nv04_mc_init(struct drm_device *); 1101extern int nv04_mc_init(struct drm_device *);
1063extern void nv04_mc_takedown(struct drm_device *); 1102extern void nv04_mc_takedown(struct drm_device *);