diff options
Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_drv.h')
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_drv.h | 60 |
1 files changed, 34 insertions, 26 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index 31e34ae16dae..6b43cb02dce0 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h | |||
@@ -150,13 +150,9 @@ enum nouveau_flags { | |||
150 | 150 | ||
151 | #define NVOBJ_ENGINE_SW 0 | 151 | #define NVOBJ_ENGINE_SW 0 |
152 | #define NVOBJ_ENGINE_GR 1 | 152 | #define NVOBJ_ENGINE_GR 1 |
153 | #define NVOBJ_ENGINE_PPP 2 | 153 | #define NVOBJ_ENGINE_CRYPT 2 |
154 | #define NVOBJ_ENGINE_COPY 3 | 154 | #define NVOBJ_ENGINE_DISPLAY 15 |
155 | #define NVOBJ_ENGINE_VP 4 | 155 | #define NVOBJ_ENGINE_NR 16 |
156 | #define NVOBJ_ENGINE_CRYPT 5 | ||
157 | #define NVOBJ_ENGINE_BSP 6 | ||
158 | #define NVOBJ_ENGINE_DISPLAY 0xcafe0001 | ||
159 | #define NVOBJ_ENGINE_INT 0xdeadbeef | ||
160 | 156 | ||
161 | #define NVOBJ_FLAG_DONT_MAP (1 << 0) | 157 | #define NVOBJ_FLAG_DONT_MAP (1 << 0) |
162 | #define NVOBJ_FLAG_ZERO_ALLOC (1 << 1) | 158 | #define NVOBJ_FLAG_ZERO_ALLOC (1 << 1) |
@@ -248,8 +244,8 @@ struct nouveau_channel { | |||
248 | /* PGRAPH context */ | 244 | /* PGRAPH context */ |
249 | /* XXX may be merge 2 pointers as private data ??? */ | 245 | /* XXX may be merge 2 pointers as private data ??? */ |
250 | struct nouveau_gpuobj *ramin_grctx; | 246 | struct nouveau_gpuobj *ramin_grctx; |
251 | struct nouveau_gpuobj *crypt_ctx; | ||
252 | void *pgraph_ctx; | 247 | void *pgraph_ctx; |
248 | void *engctx[NVOBJ_ENGINE_NR]; | ||
253 | 249 | ||
254 | /* NV50 VM */ | 250 | /* NV50 VM */ |
255 | struct nouveau_vm *vm; | 251 | struct nouveau_vm *vm; |
@@ -298,6 +294,17 @@ struct nouveau_channel { | |||
298 | } debugfs; | 294 | } debugfs; |
299 | }; | 295 | }; |
300 | 296 | ||
297 | struct nouveau_exec_engine { | ||
298 | void (*destroy)(struct drm_device *, int engine); | ||
299 | int (*init)(struct drm_device *, int engine); | ||
300 | int (*fini)(struct drm_device *, int engine); | ||
301 | int (*context_new)(struct nouveau_channel *, int engine); | ||
302 | void (*context_del)(struct nouveau_channel *, int engine); | ||
303 | int (*object_new)(struct nouveau_channel *, int engine, | ||
304 | u32 handle, u16 class); | ||
305 | void (*tlb_flush)(struct drm_device *, int engine); | ||
306 | }; | ||
307 | |||
301 | struct nouveau_instmem_engine { | 308 | struct nouveau_instmem_engine { |
302 | void *priv; | 309 | void *priv; |
303 | 310 | ||
@@ -501,17 +508,6 @@ struct nouveau_pm_engine { | |||
501 | int (*temp_get)(struct drm_device *); | 508 | int (*temp_get)(struct drm_device *); |
502 | }; | 509 | }; |
503 | 510 | ||
504 | struct nouveau_crypt_engine { | ||
505 | bool registered; | ||
506 | |||
507 | int (*init)(struct drm_device *); | ||
508 | void (*takedown)(struct drm_device *); | ||
509 | int (*create_context)(struct nouveau_channel *); | ||
510 | void (*destroy_context)(struct nouveau_channel *); | ||
511 | int (*object_new)(struct nouveau_channel *, u32 handle, u16 class); | ||
512 | void (*tlb_flush)(struct drm_device *dev); | ||
513 | }; | ||
514 | |||
515 | struct nouveau_vram_engine { | 511 | struct nouveau_vram_engine { |
516 | int (*init)(struct drm_device *); | 512 | int (*init)(struct drm_device *); |
517 | int (*get)(struct drm_device *, u64, u32 align, u32 size_nc, | 513 | int (*get)(struct drm_device *, u64, u32 align, u32 size_nc, |
@@ -531,7 +527,6 @@ struct nouveau_engine { | |||
531 | struct nouveau_display_engine display; | 527 | struct nouveau_display_engine display; |
532 | struct nouveau_gpio_engine gpio; | 528 | struct nouveau_gpio_engine gpio; |
533 | struct nouveau_pm_engine pm; | 529 | struct nouveau_pm_engine pm; |
534 | struct nouveau_crypt_engine crypt; | ||
535 | struct nouveau_vram_engine vram; | 530 | struct nouveau_vram_engine vram; |
536 | }; | 531 | }; |
537 | 532 | ||
@@ -651,6 +646,7 @@ struct drm_nouveau_private { | |||
651 | u32 ramin_base; | 646 | u32 ramin_base; |
652 | bool ramin_available; | 647 | bool ramin_available; |
653 | struct drm_mm ramin_heap; | 648 | struct drm_mm ramin_heap; |
649 | struct nouveau_exec_engine *eng[NVOBJ_ENGINE_NR]; | ||
654 | struct list_head gpuobj_list; | 650 | struct list_head gpuobj_list; |
655 | struct list_head classes; | 651 | struct list_head classes; |
656 | 652 | ||
@@ -881,6 +877,16 @@ extern void nouveau_channel_ref(struct nouveau_channel *chan, | |||
881 | extern void nouveau_channel_idle(struct nouveau_channel *chan); | 877 | extern void nouveau_channel_idle(struct nouveau_channel *chan); |
882 | 878 | ||
883 | /* nouveau_object.c */ | 879 | /* nouveau_object.c */ |
880 | #define NVOBJ_ENGINE_ADD(d, e, p) do { \ | ||
881 | struct drm_nouveau_private *dev_priv = (d)->dev_private; \ | ||
882 | dev_priv->eng[NVOBJ_ENGINE_##e] = (p); \ | ||
883 | } while (0) | ||
884 | |||
885 | #define NVOBJ_ENGINE_DEL(d, e) do { \ | ||
886 | struct drm_nouveau_private *dev_priv = (d)->dev_private; \ | ||
887 | dev_priv->eng[NVOBJ_ENGINE_##e] = NULL; \ | ||
888 | } while (0) | ||
889 | |||
884 | #define NVOBJ_CLASS(d, c, e) do { \ | 890 | #define NVOBJ_CLASS(d, c, e) do { \ |
885 | int ret = nouveau_gpuobj_class_new((d), (c), NVOBJ_ENGINE_##e); \ | 891 | int ret = nouveau_gpuobj_class_new((d), (c), NVOBJ_ENGINE_##e); \ |
886 | if (ret) \ | 892 | if (ret) \ |
@@ -1209,12 +1215,7 @@ extern int nvc0_graph_unload_context(struct drm_device *); | |||
1209 | extern int nvc0_graph_object_new(struct nouveau_channel *, u32, u16); | 1215 | extern int nvc0_graph_object_new(struct nouveau_channel *, u32, u16); |
1210 | 1216 | ||
1211 | /* nv84_crypt.c */ | 1217 | /* nv84_crypt.c */ |
1212 | extern int nv84_crypt_init(struct drm_device *dev); | 1218 | extern int nv84_crypt_create(struct drm_device *); |
1213 | extern void nv84_crypt_fini(struct drm_device *dev); | ||
1214 | extern int nv84_crypt_create_context(struct nouveau_channel *); | ||
1215 | extern void nv84_crypt_destroy_context(struct nouveau_channel *); | ||
1216 | extern void nv84_crypt_tlb_flush(struct drm_device *dev); | ||
1217 | extern int nv84_crypt_object_new(struct nouveau_channel *, u32, u16); | ||
1218 | 1219 | ||
1219 | /* nv04_instmem.c */ | 1220 | /* nv04_instmem.c */ |
1220 | extern int nv04_instmem_init(struct drm_device *); | 1221 | extern int nv04_instmem_init(struct drm_device *); |
@@ -1582,6 +1583,13 @@ nv_match_device(struct drm_device *dev, unsigned device, | |||
1582 | dev->pdev->subsystem_device == sub_device; | 1583 | dev->pdev->subsystem_device == sub_device; |
1583 | } | 1584 | } |
1584 | 1585 | ||
1586 | static inline void * | ||
1587 | nv_engine(struct drm_device *dev, int engine) | ||
1588 | { | ||
1589 | struct drm_nouveau_private *dev_priv = dev->dev_private; | ||
1590 | return (void *)dev_priv->eng[engine]; | ||
1591 | } | ||
1592 | |||
1585 | /* returns 1 if device is one of the nv4x using the 0x4497 object class, | 1593 | /* returns 1 if device is one of the nv4x using the 0x4497 object class, |
1586 | * helpful to determine a number of other hardware features | 1594 | * helpful to determine a number of other hardware features |
1587 | */ | 1595 | */ |