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path: root/drivers/gpu/drm/nouveau/nouveau_chan.c
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Diffstat (limited to 'drivers/gpu/drm/nouveau/nouveau_chan.c')
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_chan.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c
index eaa80a2b81ee..e84f4c32331b 100644
--- a/drivers/gpu/drm/nouveau/nouveau_chan.c
+++ b/drivers/gpu/drm/nouveau/nouveau_chan.c
@@ -147,7 +147,7 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nouveau_cli *cli,
147 args.limit = client->vm->vmm->limit - 1; 147 args.limit = client->vm->vmm->limit - 1;
148 } else 148 } else
149 if (chan->push.buffer->bo.mem.mem_type == TTM_PL_VRAM) { 149 if (chan->push.buffer->bo.mem.mem_type == TTM_PL_VRAM) {
150 u64 limit = pfb->ram.size - imem->reserved - 1; 150 u64 limit = pfb->ram->size - imem->reserved - 1;
151 if (device->card_type == NV_04) { 151 if (device->card_type == NV_04) {
152 /* nv04 vram pushbuf hack, retarget to its location in 152 /* nv04 vram pushbuf hack, retarget to its location in
153 * the framebuffer bar rather than direct vram access.. 153 * the framebuffer bar rather than direct vram access..
@@ -282,7 +282,7 @@ nouveau_channel_init(struct nouveau_channel *chan, u32 vram, u32 gart)
282 } else { 282 } else {
283 args.flags = NV_DMA_TARGET_VRAM | NV_DMA_ACCESS_RDWR; 283 args.flags = NV_DMA_TARGET_VRAM | NV_DMA_ACCESS_RDWR;
284 args.start = 0; 284 args.start = 0;
285 args.limit = pfb->ram.size - imem->reserved - 1; 285 args.limit = pfb->ram->size - imem->reserved - 1;
286 } 286 }
287 287
288 ret = nouveau_object_new(nv_object(client), chan->handle, vram, 288 ret = nouveau_object_new(nv_object(client), chan->handle, vram,